Side-by-side comparison
| Parameter | Half Bridge | Full Bridge Inverter |
|---|---|---|
| Switch count | 2 switches (IGBTs or MOSFETs) — one high-side, one low-side | 4 switches — two legs, each with high and low side (H-bridge) |
| Output voltage amplitude | V_dc/2 — only half the DC bus available | V_dc — full DC bus voltage across load |
| DC bus capacitor | Two series capacitors required to create mid-point; each rated V_dc/2 | Single DC bus capacitor; no mid-point needed |
| Output waveform (single phase) | Three-level: +V_dc/2, 0, –V_dc/2 | Three-level with PWM: +V_dc, 0, –V_dc (higher peak) |
| THD (with SPWM) | Higher THD for same modulation index — lower output voltage headroom | Lower THD for same switching frequency — more effective volt-second control |
| Gate drive complexity | One isolated gate drive needed (for high-side switch) | Two isolated high-side gate drives needed (one per leg) |
| Power rating suitability | Low to medium power: up to ~5 kW (small UPS, auxiliary converters) | Medium to high power: 1 kW to hundreds of kW (motor drives, solar inverters) |
| Shoot-through protection | Simpler — one pair of complementary switches | Critical — two legs; dead-time insertion needed per leg to prevent shoot-through |
| Common IC driver | IR2110 (single bootstrap driver for one leg) | IR2110 × 2 or IR2113 for both legs; gate drive transformer optional |
| Real application | Off-line UPS auxiliary inverter, half-bridge LLC resonant converter in SMPS | VFD for 3-phase induction motor (3 full-bridge legs), 1-phase grid-tied solar inverter |
Key differences
The output voltage difference is decisive. A full-bridge inverter on a 400 V DC bus delivers ±400 V to the load, while a half-bridge delivers only ±200 V. For a 230 V AC RMS output you need a DC bus of at least 325 V peak — a half-bridge needs a 650 V bus while a full-bridge manages with a 325 V bus. That is why every commercial VFD for induction motors uses a full-bridge (three full-bridges for three phases, giving a 6-switch three-phase inverter). Half-bridges dominate in LLC resonant SMPS topologies where the symmetric switching halves voltage stress on the transformer primary. Dead-time between complementary gate signals — typically 0.5 μs to 2 μs — is mandatory in full-bridge to prevent shoot-through that would short the DC bus.
When to use Half Bridge
Use a half-bridge inverter when DC bus voltage is high enough to deliver the required output at half its value, or when component count must be minimal — a half-bridge LLC resonant converter in a 600 W PC power supply uses only two IGBTs with the DC bus split by two 470 μF capacitors.
When to use Full Bridge Inverter
Use a full-bridge inverter for motor drive or grid-tied inverter applications where maximum voltage utilisation from the DC bus is required — a 2.2 kW VFD for a three-phase induction motor uses three full-bridge legs driven by an IR2110-based gate drive circuit.
Recommendation
For power electronics exam problems, choose full-bridge whenever output power exceeds 1 kW or when the DC bus voltage is already near the minimum needed for the AC output. Half-bridge only makes sense when cost or switch count is explicitly constrained and the DC bus has sufficient headroom.
Exam tip: Examiners ask you to calculate the fundamental output voltage of a single-phase full-bridge SPWM inverter — know that V_1 = (4V_dc/π) × (M_a/2) for unipolar PWM where M_a is the modulation index, and state that full-bridge doubles the output compared to half-bridge for the same V_dc.
Interview tip: Interviewers at power electronics companies (Siemens, ABB, Delta hiring) ask you to explain dead-time and why it is critical in a full-bridge — answer that without dead-time, both switches in one leg conduct simultaneously for a few microseconds, shorting the DC bus and destroying the IGBTs, so a 1–2 μs delay is inserted between turn-off of one switch and turn-on of the other.