8-to-3 Encoder

Octal keypad interfaces and optical sensor arrays output one of eight possible states at a time, and an 8-to-3 encoder compresses those eight lines into a 3-bit binary code, reducing the number of wires entering a microcontroller from eight to three. The 74HC148 is the standard active-low IC for this task.

Core Concept

An encoder is the inverse of a decoder. It accepts 2^n input lines and produces an n-bit binary output representing which input is active. A basic 8-to-3 encoder assumes exactly one input is active at a time (one-hot encoding). If two inputs are active simultaneously, the output is incorrect unless a priority circuit is added.

The 74HC148 solves the simultaneous-input problem by implementing priority encoding. I7 has the highest priority. It operates with active-low inputs and active-low outputs. Supply: 2 V to 6 V. Propagation delay: 24 ns at 5 V. The TTL 74LS148 runs at 25 ns with a 4.75–5.25 V supply.

A plain 8-to-3 encoder can be built from OR gates. A2 = I4 + I5 + I6 + I7. A1 = I2 + I3 + I6 + I7. A0 = I1 + I3 + I5 + I7. These three three-input OR gates cover all eight input lines. The 74HC148 implements this same logic but adds masking to enforce priority when multiple inputs are active.

Boolean Expression

For the basic (non-priority) encoder, assuming one-hot inputs: A2 = I4 + I5 + I6 + I7, A1 = I2 + I3 + I6 + I7, A0 = I1 + I3 + I5 + I7. Each output bit is the OR of the inputs whose binary representation has a 1 in that bit position. This is derived directly from the truth table by reading the column for each output bit.

Given:
  One-hot input: I5 = 1, all others = 0
  Encode to 3-bit binary

Formula:
  A2 = I4 + I5 + I6 + I7
  A1 = I2 + I3 + I6 + I7
  A0 = I1 + I3 + I5 + I7

Step by step:
  A2 = 0 + 1 + 0 + 0 = 1
  A1 = 0 + 0 + 0 + 0 = 0
  A0 = 0 + 0 + 1 + 0 = 1

  Output: A2 A1 A0 = 1 0 1 = binary 5

Verification:
  Input line I5 → output should be 5 = 101 binary ✓

Final Answer:
  A2=1, A1=0, A0=1 → encoded value = 5

Exam Tip: The basic 8-to-3 encoder fails when two or more inputs are simultaneously active—the OR logic ORs together incorrect bit patterns and produces a wrong code. This is the key limitation that priority encoders solve. Anna University questions regularly ask to "identify the limitation of a plain encoder and suggest a solution." The answer is always the priority encoder with GS and EO flags.

Key Properties

• IC: 74HC148 (priority 8-to-3), 74LS148 (TTL version, 25 ns)
• Basic encoder: requires one-hot input (only one active at a time)
• Priority encoder: handles multiple active inputs, highest index wins
• Propagation delay: 24 ns (74HC148), 25 ns (74LS148)
• Supply: 2–6 V (HC), 4.75–5.25 V (LS TTL)
• Fan-out: 10 HC loads; inputs and outputs active-low on 74HC148
• OR gate implementation: A2 = I4+I5+I6+I7, A1 = I2+I3+I6+I7, A0 = I1+I3+I5+I7

Quick Revision

• 8-to-3 encoder: 8 inputs → 3-bit binary output
• Basic encoder assumes one-hot input; breaks with multiple simultaneous active inputs
• Output bit An = OR of all inputs whose index has bit n set to 1
• 74HC148 adds priority: I7 highest, I0 lowest
• Used in keypad scanning, ADC output encoding, interrupt line reduction
• Encoder is the inverse function of a decoder
• Exam trap: applying OR gate encoder equations when multiple inputs are active and treating the result as a valid encoded address