2-to-1 Multiplexer

A 2-to-1 multiplexer is the simplest and most fundamental data selector circuit in digital electronics. It selects one of two input data lines and routes it to a single output, controlled by one select line. Mastering the 2-to-1 MUX is the gateway to understanding all higher-order multiplexers and their applications in Boolean function implementation.

Core Concept Explanation

The word multiplexer comes from Latin meaning many-to-one. A 2-to-1 MUX has two data inputs labeled I0 and I1, one select line labeled S, and one output Y. The select line acts like a switch. When S = 0, input I0 is connected to the output. When S = 1, input I1 is connected to the output. The data on the non-selected input is completely ignored.

The Boolean expression for a 2-to-1 MUX is: Y = S'.I0 + S.I1. This equation captures the logic directly. The term S'.I0 activates when S is 0, passing I0. The term S.I1 activates when S is 1, passing I1. The two terms are mutually exclusive so they simply OR together to give the final output.

At the gate level, a 2-to-1 MUX requires one NOT gate for the complement of S, two AND gates (one for each product term), and one OR gate to combine them. This four-gate implementation is the minimal SOP realization. Alternatively, it can also be implemented using a single 2-input transmission gate pair in CMOS, making it extremely compact in integrated circuits.

Mathematical Expression

The output function of a 2-to-1 MUX is derived directly from its operation. When S = 0, only the first AND gate is enabled (S' = 1), so Y = I0. When S = 1, only the second AND gate is enabled, so Y = I1. Combining both conditions using the OR operation gives the complete expression.

The expression Y = S'.I0 + S.I1 is a standard 2-variable selector function. Generalizing, for a 2n-to-1 MUX the output is the sum of 2n product terms, each being the minterm of the select lines AND the corresponding data input. The 2-to-1 MUX is the base case of this general form.

Practical Understanding

In real digital systems, multiplexers serve as data routing switches, bus selectors, and serial-to-parallel converters. In microprocessors, multiplexers are used inside the register file and ALU to select between multiple operand sources. The 2-to-1 MUX is also a fundamental cell in FPGA routing fabrics where it implements programmable connections.

A very important practical application is using a 2-to-1 MUX as a function generator. Since Y = S'.I0 + S.I1, if you fix I0 and I1 to constants 0 or 1 and use S as the variable, you can implement any single-variable Boolean function. This property scales up with larger MUXes.

Given:
I0 = 0, I1 = 1, S = 1

Why this formula applies:
Y = S'.I0 + S.I1 is the standard 2-to-1 MUX output equation.
With S = 1, the S term enables I1.

Formula:
Y = S'.I0 + S.I1

Substitution:
Y = (1)'.0 + (1).1
Y = 0.0 + 1.1

Calculation:
Y = 0 + 1

Final Answer: Y = 1
Since S=1, output follows I1 = 1. Data routing confirmed.

Exam Tip: Y = S'.I0 + S.I1 is the single most important equation for MUX problems. In GATE, if S=0 always outputs I0 and S=1 always outputs I1, the MUX is working correctly. A common trap is to confuse the subscript: S=0 selects I0 (not I1).

Quick Revision

• 2-to-1 MUX: 2 data inputs (I0, I1), 1 select line (S), 1 output (Y).
• Boolean expression: Y = S'.I0 + S.I1. Memorize this exactly.
• S=0 routes I0 to output. S=1 routes I1 to output.
• Gate implementation: 1 NOT + 2 AND + 1 OR gate.
• Can implement any 1-variable Boolean function by fixing I0, I1 to 0 or 1.
• Exam trap: S=0 selects I0 not I1. The subscripts of S value and input match.