Contents

Digital Electronics
Number Systems
Logic Gates
Boolean Algebra
Combinational Circuits
Sequential Circuits
Memory & PLDs
Digital System Design
Other Topics
Other Subjects
Section Progress48%

11 of 23 articles

8-to-1 Multiplexer

Three select lines, cascading for larger MUX.

Darshan N
Updated: 7 April 2026
7 min read

The 8-to-1 multiplexer appears in data selector networks, FPGA routing fabrics, and communication switch matrices. Its 3-bit select input gives it enough address space to implement any 3-variable Boolean function directly, with no external gates.

8-to-1 Multiplexer — IC 74151MUX8:1I0I1I2I3I4I5I6I7YW (Y')S2S1S0Truth TableS2 S1 S0 Y0 0 0 I00 0 1 I10 1 0 I20 1 1 I31 0 0 I41 0 1 I51 1 0 I61 1 1 I7Active-low Strobe:E' = 0 → normal operationE' = 1 → Y=0, W=1IC: 74151 (TTL), 74HC151 (CMOS)
Figure 1: 8-to-1 MUX (74151) with truth table showing select-to-input mapping and complementary outputs

Core Concept

An 8-to-1 multiplexer connects one of eight data inputs to a single output, controlled by a 3-bit select code S2, S1, S0. S2 is the MSB. The select code forms the binary index of the chosen input: S2S1S0 = 011 routes I3 to the output.

The 74151 is the standard TTL 8:1 MUX IC. It provides both the true output Y and the complement output W (labelled W or Y-bar on datasheets), which saves an external inverter in many designs. It also has an active-low strobe input E: when E = 1 (high), Y is forced to 0 and W to 1, disabling the MUX without removing power.

The 74LS151 runs from 5 V with a propagation delay of 20 ns (typ) and a fan-out of 20. The 74HC151 CMOS version runs from 2 V to 6 V, consumes under 80 µA static, and achieves 15 ns at 4.5 V. Two 74151 chips cascade using the strobe input to build a 16:1 MUX without extra glue logic.

Boolean Expression

The output is Y = Σ(i=0 to 7) mi(S2,S1,S0) · Ii where mi is the ith minterm of the select lines. Expanded: Y = S2'S1'S0'I0 + S2'S1'S0·I1 + S2'S1S0'I2 + S2'S1S0·I3 + S2S1'S0'I4 + S2S1'S0·I5 + S2S1S0'I6 + S2S1S0·I7. When strobe E = 1 (active-low disabled), Y = 0 regardless of inputs.

Example
Given:
  8:1 MUX, inputs I0=1, I1=0, I2=1, I3=1,
              I4=0, I5=1, I6=0, I7=1
  Select: S2=1, S1=0, S0=1
  Strobe E' = 0 (enabled)

Formula / Rule:
  Y = minterm(S2,S1,S0) · I_selected
  S2S1S0 in binary → decimal index → select that I

Step by step:
  S2S1S0 = 101 (binary) = 5 (decimal)
  → select input I5
  I5 = 1
  Strobe active (E'=0), so no suppression.
  Y = I5 = 1
  W = Y' = 0

Verification using full expression:
  Only term S2·S1'·S0 = 1·1·1 = 1 (for i=5)
  All other terms have at least one 0 factor.
  Y = 1·I5 = 1  ✓

Final Answer:
  Y = 1, W = 0
Exam Tip: A 74151 (8:1 MUX) can realise any 3-variable Boolean function directly — connect the three variables to S2, S1, S0 and load the function's truth table values (0 or 1) onto I0 through I7. No gates needed. For a 4-variable function using an 8:1 MUX, connect three variables to the selects and express the output for each select combination as a function of the fourth variable (0, 1, D, or D') on the data inputs.

Key Properties

  • 74151: 8:1 MUX, 16-pin DIP, 5 V TTL, 20 ns propagation delay (LS), fan-out 20.
  • 74HC151: CMOS, 2–6 V, 15 ns at 4.5 V, low power — preferred for portable designs.
  • Provides both Y and W (complemented) outputs — saves one inverter.
  • Active-low strobe E': Y = 0 when E' = 1; use for chip-select control in cascading.
  • Two 74151 chips + one 2:1 MUX (or using the strobe) build a 16:1 MUX.
  • Directly implements any 3-variable Boolean function; extends to 4 variables with data-input expressions.
  • Internal structure: eight 4-input AND gates, one 8-input OR gate, three inverters for select complements.

Quick Revision

  • 8 data inputs, 3 select lines, 1 output Y and complement W.
  • S2S1S0 binary value = index of selected input.
  • IC 74151 (TTL), 74HC151 (CMOS).
  • Active-low strobe E': when high, Y = 0, W = 1.
  • Implements any 3-variable function with no extra gates.
  • Two 74151s cascade to form 16:1 MUX.
  • W output is the complement of Y — built-in, no external inverter needed.
  • Exam trap: listing eight terms in the output expression but forgetting to AND each term with the strobe condition — when strobe is active-low and E' = 1, all terms are masked to zero regardless of I0–I7.

8-to-1 MUX Quiz

Test your understanding of 8-to-1 MUX operation, cascading, and function generation.

Question 1 of 3

Q1.An 8-to-1 MUX requires how many select lines?