How it works
The two-transistor model explains SCR latching: the device is equivalent to a PNP (Q1) and NPN (Q2) transistor with collector of each driving the base of the other. Once αPNP + αNPN ≥ 1, regenerative action latches the device ON. Gate current of 20–100 mA at 1–2 V is sufficient to trigger a typical SCR. Latching current IL (minimum anode current to stay ON after gate pulse ends, typically 20–100 mA) must be reached; holding current IH (minimum to stay latched, typically 5–30 mA) must be maintained — falling below IH turns the device off. Natural commutation (line commutation) in AC circuits turns the SCR off at natural current zero.
Key points to remember
V-I characteristic: in forward blocking state, small leakage current until forward breakover voltage VBO (200–2000 V). With gate pulse, VBO reduces to near zero — device switches to low-voltage (1–1.5 V) conduction state. Reverse blocking: like a reverse-biased diode, leakage until reverse breakdown (typically equal to VBO). dv/dt triggering is a problem — rapid voltage rise can turn on an SCR without a gate pulse; typically dv/dt rating is 100–1000 V/µs. di/dt rating limits the rate of anode current rise to prevent hot-spot damage; typical limit is 100–200 A/µs.
Exam tip
The examiner always asks you to sketch the V-I characteristic of an SCR and mark VBO, IH, IL, forward conduction, and reverse blocking regions — practise drawing it with all labels in one minute.