Cheat sheets

Analog Circuits Cheat Sheet

Quick reference for Analog Circuits: BJT biasing, op-amp configurations, MOSFET operation, diode equations, and amplifier analysis for ECE students.

Visual

ConfigGainPhaseRinInverting-Rf / Rin180 degRinNon-inverting1 + Rf/R10 degVery highVoltage follower10 degVery highIntegrator-(1/RC) int V dt90 deg lagRDifferentiator-RC dV/dt90 deg leadLow (cap)

Key formulas

NameFormulaVariables / Notes
Diode Shockley equationI_D = I_S (e^(V_D / n V_T) - 1)I_D: diode current; I_S: reverse saturation current (typ. 1e-14 A); V_D: diode voltage; n: ideality factor (1 to 2); V_T: thermal voltage = kT/q = 26 mV at 300K
BJT collector currentI_C = beta * I_B = I_S e^(V_BE / V_T)I_C: collector current; beta: current gain (hFE, typ. 50 to 300); I_B: base current; V_BE: base-emitter voltage (0.7 V for Si)
MOSFET drain current (saturation)I_D = (1/2) u_n C_ox (W/L) (V_GS - V_th)^2u_n: electron mobility; C_ox: oxide capacitance per area; W/L: width-to-length ratio; V_th: threshold voltage
Op-amp virtual shortV+ = V- (ideal op-amp)V+: non-inverting input voltage; V-: inverting input voltage; valid when negative feedback is applied and op-amp is not saturated
Inverting amplifier gainA_v = -R_f / R_inA_v: voltage gain; R_f: feedback resistor; R_in: input resistor; negative sign indicates phase inversion
Non-inverting amplifier gainA_v = 1 + R_f / R1A_v: voltage gain (always >= 1); R_f: feedback resistor; R1: resistor from inverting input to ground

Key concepts

BJT operating regions

Cut-off: both junctions reverse biased, I_C = 0. Active: V_BE = 0.7 V (forward), V_BC < 0 (reverse), I_C = beta I_B, used for amplification. Saturation: both junctions forward biased, V_CE approximately 0.2 V, used as a switch in ON state.

MOSFET regions

Cut-off: V_GS < V_th, no channel, I_D = 0. Linear (triode): V_DS < V_GS - V_th, channel present, I_D proportional to V_DS. Saturation: V_DS >= V_GS - V_th, channel pinched at drain, I_D = (1/2) k_n (V_GS - V_th)^2.

Op-amp golden rules (ideal)

Rule 1: the differential input voltage V+ - V- = 0 when negative feedback is present. Rule 2: no current flows into either input terminal. These two rules allow rapid analysis of any op-amp circuit without knowing open-loop gain.

Small-signal model (BJT)

The BJT small-signal model uses transconductance g_m = I_C / V_T and input resistance r_pi = beta / g_m. The controlled current source i_c = g_m v_be models amplification. r_o = V_A / I_C models Early effect output resistance.

Feedback types

Series-series feedback increases input and output resistance. Shunt-shunt feedback decreases both. Series-shunt (voltage amplifier) increases Rin and decreases Rout. Shunt-series (current amplifier) decreases Rin and increases Rout.

Miller theorem

An impedance Z connected between input and output of an amplifier with gain A_v can be replaced by Z/(1-A_v) at the input and Z/(1-1/A_v) at the output. This is essential for computing bandwidth of inverting amplifiers.

Tables

BJT vs MOSFET Comparison

ParameterBJT (NPN)NMOS
ControlCurrent (I_B)Voltage (V_GS)
Input impedanceLow (r_pi = beta/g_m)Very high (gate insulated)
Transconductanceg_m = I_C / V_Tg_m = 2I_D / (V_GS-V_th)
ON voltageV_BE = 0.7 VV_GS > V_th (typ 0.5-2 V)
SpeedHigh (GHz range)Very high (GHz range)
IntegrationModerateVery high (VLSI)

Op-Amp Configuration Summary

ConfigurationGainRinPhase
Inverting-Rf/RinRin (low)180 deg
Non-inverting1 + Rf/R1Very high0 deg
Voltage follower1Very high0 deg
Summing (inv.)-Rf(V1/R1+V2/R2)R1, R2 sep.180 deg
Differentiator-RC dV/dtC (low at DC)90 deg lead
Integrator-(1/RC) int V dtR90 deg lag

Rectifier Circuit Comparison

TypeV_out (peak)Ripple freq.Diodes used
Half-waveV_p - 0.7f_in1
Full-wave (CT)V_p - 0.72 f_in2
BridgeV_p - 1.42 f_in4

Quick facts

  • Thermal voltage V_T = kT/q = 25.85 mV at 300 K (approximately 26 mV). It appears in both BJT and diode equations.
  • For a silicon BJT in active region, V_BE = 0.7 V and V_CE(sat) = 0.2 V are standard exam values.
  • The 3 dB bandwidth of an inverting op-amp amplifier is f_3dB = GBW / |A_v|, where GBW is the gain-bandwidth product.
  • A MOSFET is in saturation when V_DS >= V_GS - V_th. This is the region used for amplification.
  • The Early voltage V_A models BJT output resistance: r_o = V_A / I_C. Typical V_A = 50 to 200 V.
  • Op-amp slew rate limits large-signal bandwidth. For a sine wave: max frequency = SR / (2 pi V_peak).
  • CMRR = 20 log10(A_differential / A_common-mode). A good op-amp has CMRR > 80 dB.
  • Zener diode operates in reverse breakdown. Voltage regulation uses the flat V-I characteristic in that region.

Exam shortcuts

  1. DC biasing shortcut for BJT voltage divider: if beta * R_E >> R1 || R2, the base current is negligible. Then V_B = V_CC * R2/(R1+R2), V_E = V_B - 0.7, I_C = V_E/R_E. This avoids writing full KVL equations.
  2. Op-amp virtual short method: label the non-inverting input voltage, then set the inverting input to the same value. Apply KCL at the inverting node with zero current into the terminal. Solve for V_out. Works for any linear configuration.
  3. g_m calculation shortcut: for BJT, g_m = I_C / 26 mV. For I_C = 1 mA, g_m = 38.5 mA/V. For I_C = 0.5 mA, g_m = 19.2 mA/V. Memorize the 1 mA value and scale linearly.
  4. MOSFET region identification: check V_DS >= V_GS - V_th for saturation. If V_GS < V_th the device is off. Always confirm region before writing the drain current equation.
  5. Miller capacitance shortcut: for an inverting amplifier with voltage gain A_v and feedback capacitance C_f, the effective input capacitance is C_f (1 - A_v). For A_v = -10 and C_f = 1 pF, C_Miller = 11 pF. This drastically reduces bandwidth.