Cheat sheets

Electronic Devices and Circuits Cheat Sheet

Quick reference for diodes, BJTs, FETs, amplifiers, and biasing circuits. Formulas, tables, and exam shortcuts for EDC.

Visual

NameFormulaConditionDiode (Shockley)I = Is(e^(V/nVt) - 1)Forward biasBJT (Active)IC = β * IBBE fwd, BC revMOSFET Sat.ID = k(VGS-Vth)^2 / 2VDS >= VGS-VthTransconductancegm = IC / VTSmall-signal model

Key formulas

NameFormulaVariables / Notes
Diode Current (Shockley Equation)I = I_s * (e^(V / (n * V_T)) - 1)I: diode current (A); I_s: reverse saturation current (A); V: applied voltage (V); n: ideality factor (1 to 2); V_T: thermal voltage = kT/q ≈ 26 mV at 300 K
BJT Collector CurrentI_C = β * I_BI_C: collector current (A); β (h_FE): DC current gain; I_B: base current (A)
MOSFET Drain Current (Saturation)I_D = (μ_n * C_ox / 2) * (W/L) * (V_GS - V_th)^2I_D: drain current (A); μ_n: electron mobility (cm²/V·s); C_ox: gate oxide capacitance per unit area (F/cm²); W/L: width-to-length ratio; V_GS: gate-to-source voltage (V); V_th: threshold voltage (V)
Voltage Divider Bias (BJT)V_B = V_CC * R2 / (R1 + R2)V_B: base voltage (V); V_CC: supply voltage (V); R1, R2: voltage divider resistors (Ω)
Small-Signal Transconductance (BJT)g_m = I_C / V_Tg_m: transconductance (A/V); I_C: quiescent collector current (A); V_T: thermal voltage ≈ 26 mV

Key concepts

PN Junction Depletion Region

At equilibrium, diffusion of majority carriers creates a charge-depleted region. Built-in potential V_0 ≈ 0.7 V for silicon. Depletion width widens under reverse bias and narrows under forward bias.

BJT Operating Regions

Active: B-E forward biased, B-C reverse biased; used for amplification. Saturation: both junctions forward biased; used as a switch ON. Cutoff: both junctions reverse biased; switch OFF.

MOSFET Channel Formation

Applying V_GS > V_th inverts the semiconductor surface, forming a conducting channel between drain and source. In the linear region, I_D increases with V_DS. In saturation, I_D is nearly constant.

Feedback in Amplifiers

Negative feedback reduces gain but improves bandwidth, linearity, and input/output impedance depending on topology. Gain with feedback: A_f = A / (1 + Aβ), where β is the feedback fraction.

Zener Diode Regulation

Operates in reverse breakdown at a fixed voltage V_Z. Used in shunt regulator circuits. Series resistor R_S limits current: R_S = (V_in - V_Z) / I_Z.

Tables

BJT vs MOSFET Comparison

ParameterBJT (NPN)MOSFET (NMOS)
ControlCurrent (I_B)Voltage (V_GS)
Input ImpedanceLow (kΩ range)Very High (GΩ range)
Switching SpeedModerateFast
NoiseLower 1/f noiseHigher 1/f noise
BiasingRequires I_BNo gate current needed

Diode Types and Applications

Diode TypeKey PropertyTypical Use
Rectifier (1N4007)V_f ≈ 0.7 V, up to 1 AAC to DC conversion
ZenerFixed reverse breakdown V_ZVoltage regulation
SchottkyV_f ≈ 0.3 V, fast recoveryHigh-frequency rectification
LEDEmits light at forward biasOptical indicators
VaractorC_j varies with reverse VVoltage-controlled tuning

Quick facts

  • Silicon diode forward voltage drop: 0.7 V; Germanium: 0.3 V.
  • Thermal voltage V_T = kT/q = 26 mV at room temperature (300 K).
  • BJT current gain β typically ranges from 50 to 300 for small-signal transistors.
  • MOSFET threshold voltage V_th for typical NMOS processes is 0.5 V to 1.5 V.
  • Early voltage V_A for BJTs is typically 50 V to 200 V; accounts for output resistance r_o = V_A / I_C.
  • For a CE amplifier: voltage gain A_v = -g_m * R_C (ignoring r_o).
  • Depletion width W ∝ sqrt(V_R) for an abrupt PN junction under reverse bias V_R.

Exam shortcuts

  1. To find Q-point quickly for voltage divider bias: use Thevenin equivalent at the base. V_th = V_CC * R2/(R1+R2), R_th = R1||R2. Then I_B = (V_th - 0.7) / (R_th + (1+β)*R_E). Avoids loop equations entirely.
  2. For MOSFET saturation vs linear check: if V_DS >= V_GS - V_th, the device is in saturation. State this condition first before computing I_D to avoid region errors.
  3. g_m shortcut for BJT: g_m = 40 * I_C at room temperature (since 1/V_T = 1/0.025 = 40). For I_C = 1 mA, g_m = 40 mA/V instantly.
  4. When drawing small-signal model, replace: V_CC with ground, capacitors with short circuit, DC sources with zero. Then write KCL/KVL directly on the simplified circuit.