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GATE ECE Full Practice Hub

Cross-subject GATE ECE practice questions covering networks, signals, control systems, communications, and digital electronics with full explanations.

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BeginnerLaplace TheoremsIntermediateAliasing in sincAdvancedRouth K Range

Hub intro

This hub provides mixed-subject GATE ECE practice across the major topic areas: network theory, signals and systems, control systems, analog electronics, digital circuits, and communications. Each set reflects the actual GATE ECE question distribution and difficulty pattern.

Difficulty levels

BeginnerIntermediateAdvanced

Practice sets

Beginner: Core Concept Recall
Beginner
State the initial and final value theorems of the Laplace transform.
Answer: Initial value theorem: lim(t→0+) f(t) = lim(s→∞) s F(s). Final value theorem: lim(t→∞) f(t) = lim(s→0) s F(s), provided all poles of s F(s) lie in the left half-plane.
The initial value theorem extracts the behaviour of f(t) at t = 0 from its Laplace transform without inverting. The final value theorem extracts steady-state behaviour. The condition for the final value theorem (poles of s F(s) in the open left half-plane) is critical: if F(s) has poles on the imaginary axis or in the right half-plane, the theorem does not apply and using it gives a wrong answer.
Define gain margin and phase margin for a feedback control system.
Answer: Gain margin (GM) is the factor by which the open-loop gain can be increased before the closed-loop system becomes unstable, measured at the phase crossover frequency (where phase = -180°). Phase margin (PM) is the additional phase lag required to bring the system to the verge of instability, measured at the gain crossover frequency (where |G(jω)H(jω)| = 1).
A stable system has GM > 1 (positive in dB) and PM > 0°. Typical design targets are GM > 6 dB and PM between 30° and 60°. A higher phase margin gives a more damped transient response. For a second-order system, PM ≈ 100 ζ for ζ < 0.7, providing a quick relationship between damping ratio and phase margin.
What is the transfer function of an ideal integrator and ideal differentiator in the s-domain?
Answer: Ideal integrator: H(s) = 1/s. Ideal differentiator: H(s) = s.
The integrator has a pole at s = 0 (on the imaginary axis), making it marginally stable. The differentiator has a zero at s = 0, amplifies high-frequency noise, and is not used in pure form in practice. In op-amp circuits, the inverting integrator uses a capacitor in the feedback and a resistor at the input, giving H(s) = -1/(RCs).
Intermediate: Mixed-subject Problems
Intermediate
A signal x(t) = sinc(200t) is sampled at f_s = 150 Hz. Determine whether aliasing occurs and identify the aliased frequency if any.
Answer: sinc(200t) has bandwidth f_m = 100 Hz (since sinc(2Wt) has bandwidth W, so 200t corresponds to W = 100 Hz). Nyquist rate = 2 × 100 = 200 Hz. Since f_s = 150 Hz < 200 Hz, aliasing occurs. Aliased component: f_alias = |f_s - f_m| = |150 - 100| = 50 Hz.
sinc(at) has Fourier transform (1/|a|) rect(f/a), which is non-zero for |f| < a/2. Here sinc(200t) = sinc(2 × 100 × t), so bandwidth = 100 Hz. Sampling at 150 Hz, the frequency 100 Hz folds to 150 - 100 = 50 Hz. In general, a frequency f > f_s/2 aliases to |f - k f_s| for the nearest integer k.
A BJT common-emitter amplifier has R_C = 5 kΩ, r_e = 25 Ω (small-signal emitter resistance), and β = 100. Find the voltage gain A_v = V_out/V_in.
Answer: A_v = -β R_C / (β r_e + R_S) ≈ -R_C / r_e for R_S = 0. A_v = -5000/25 = -200.
For a CE amplifier with no emitter bypass capacitor, A_v = -R_C / (r_e + R_E). With R_E = 0 (or fully bypassed): A_v = -R_C / r_e. r_e = V_T / I_C where V_T = 26 mV at room temperature. The negative sign indicates 180° phase inversion. The gain can also be expressed as A_v = -g_m R_C where g_m = 1/r_e = I_C/V_T.
Find the Z-transform of x[n] = (0.5)^n u[n] and state its region of convergence (ROC).
Answer: X(z) = 1 / (1 - 0.5 z^-1) = z / (z - 0.5). ROC: |z| > 0.5.
The Z-transform of a^n u[n] is 1/(1 - a z^-1) with ROC |z| > |a|. Here a = 0.5. The ROC is the region outside a circle of radius 0.5 in the z-plane. This is a causal, right-sided sequence, so the ROC extends outward from the pole at z = 0.5. For stability of an LTI system, the ROC must include the unit circle |z| = 1. Since 0.5 < 1, the ROC |z| > 0.5 includes the unit circle and the system is stable.
Advanced: GATE-pattern Questions with Traps
Advanced
The open-loop transfer function of a system is G(s) = K / [s(s+2)(s+4)]. Using the Routh-Hurwitz criterion, find the range of K for closed-loop stability.
Answer: Closed-loop characteristic equation: s^3 + 6s^2 + 8s + K = 0. Routh array: Row 1: 1, 8. Row 2: 6, K. Row 3: (48 - K)/6, 0. Row 4: K. For stability, all first-column elements must be positive: (48 - K)/6 > 0 => K < 48, and K > 0. Therefore 0 < K < 48.
Characteristic polynomial: 1 + G(s) = 0 => s(s+2)(s+4) + K = 0 => s^3 + 6s^2 + 8s + K = 0. The Routh array third row element is (a_1 a_2 - a_0 a_3) / a_1 = (6 × 8 - 1 × K)/6 = (48 - K)/6. The trap is to form the characteristic equation incorrectly by not expanding s(s+2)(s+4) fully. The fourth row element is K (from row 2, last element). All entries must be positive for stability.
A 4-bit ripple carry adder adds A = 1011 and B = 0111 with initial carry C_in = 0. Trace the sum and carry outputs at each bit position and give the final 5-bit result.
Answer: Bit 0: 1+1+0=2, S0=0, C1=1. Bit 1: 1+1+1=3, S1=1, C2=1. Bit 2: 0+1+1=2, S2=0, C3=1. Bit 3: 1+0+1=2, S3=0, C4=1. Result: C4 S3 S2 S1 S0 = 1 0 0 1 0 = 10010 (decimal 18).
Check: A = 1011 = 11, B = 0111 = 7. 11 + 7 = 18 = 10010 in binary. The carry ripples through each stage, which is why this adder is slow for large bit widths. The worst-case delay is n × t_FA (n full-adder delays). The trap is to miss the final carry-out C4 and report only the lower 4 bits (0010 = 2, which is wrong).
An ideal op-amp has two resistors R1 = 10 kΩ and R2 = 90 kΩ in the inverting amplifier configuration. A 0.1 V sinusoidal input is applied. Find V_out and the input impedance seen by the source.
Answer: A_v = -R2/R1 = -90/10 = -9. V_out = -9 × 0.1 = -0.9 V (sinusoidal, 180° phase shifted). Input impedance Z_in = R1 = 10 kΩ.
For an inverting amplifier, the virtual ground at the inverting input means the input current flows entirely through R1 (not into the op-amp input). Therefore the source sees an input impedance equal to R1, not the sum of R1 and R2. The trap in GATE questions is to select the option Z_in = R1 + R2 = 100 kΩ, which would be correct for a non-inverting configuration. For the non-inverting amplifier, Z_in is ideally infinite (it connects directly to the non-inverting input).

Lab exercises

  • Implement the Routh-Hurwitz criterion in a Python script that accepts polynomial coefficients and returns the stability range for K: lab-routh-hurwitz-python
  • Simulate a 4-bit ripple carry adder and a 4-bit carry lookahead adder in Logisim, measure and compare worst-case propagation delay: lab-rca-vs-cla-logisim
  • Plot the Bode magnitude and phase for G(s) = K/[s(s+2)(s+4)] in MATLAB for K = 1, find GM and PM using the margin command: lab-bode-plot-gain-margin

Revision checklist

  • Can you write the Routh array for a 4th-order polynomial and identify stability conditions without looking at a reference?
  • Can you apply the final value theorem and verify the stability condition before using it?
  • Can you convert a sinc function to its bandwidth in Hz directly from its argument?
  • Can you find voltage gain and input impedance for both inverting and non-inverting op-amp configurations?
  • Can you compute the Z-transform of standard sequences and state the ROC for causal and anti-causal signals?
  • Can you trace a 4-bit addition on paper including carry propagation and verify using decimal arithmetic?