MOSFET Structure

Gate, oxide, channel.

Darshan N
Updated: 19 March 2026
10 min read

The MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is the fundamental building block of modern digital and analog integrated circuits. Understanding its physical structure is essential before analyzing its electrical behavior, and this topic carries direct weight in GATE Electronics and Communication Engineering.

p-type Silicon Substraten+ Sourcen+ DrainChannel Region (p-type)Gate Oxide (SiO2)Metal Gate (Polysilicon)SDGB (Bulk)toxn-channel MOSFET Cross-SectionL (channel length)Gate terminal controls channelvia electric field through oxide
Figure 1: Cross-sectional view of an n-channel MOSFET showing all four terminals and layer arrangement

Core Structure of the MOSFET

A MOSFET consists of four distinct regions: the source, the drain, the gate, and the body (substrate). In an n-channel MOSFET (NMOS), the source and drain are heavily doped n-type (n+) regions fabricated inside a p-type substrate. The region between source and drain, directly below the gate, is called the channel region. The gate electrode sits above this channel, separated by a thin insulating layer of silicon dioxide (SiO2).

The gate insulator is what makes the MOSFET fundamentally different from a BJT. No DC current flows into the gate terminal because the oxide is a perfect insulator under normal operating voltages. This gives the MOSFET its extremely high input impedance, which is one of the primary advantages over bipolar transistors in integrated circuit design.

The thickness of the gate oxide, denoted t_ox, is one of the most critical fabrication parameters. Modern MOSFETs use gate oxide as thin as 1 to 2 nm. The oxide capacitance per unit area is given by Cox = epsilon_ox / t_ox, where epsilon_ox is the permittivity of silicon dioxide (approximately 3.9 * epsilon_0). This parameter appears directly in the drain current equations and determines how strongly the gate controls the channel.

Gate Oxide and Its Role

The gate oxide serves two purposes simultaneously. First, it electrically isolates the gate from the channel so that no steady-state current is drawn by the control terminal. Second, it allows the electric field from the gate voltage to penetrate into the semiconductor and modulate the charge density in the channel region below. This field-effect mechanism is what gives the device its name.

When a sufficiently large positive voltage is applied to the gate (relative to source) in an NMOS device, the electric field repels holes from the p-type substrate near the oxide interface and attracts electrons. When the gate voltage exceeds the threshold voltage V_T, a thin layer of electrons forms at the oxide-semiconductor interface, creating a conducting inversion layer that connects source to drain. This inversion layer is the channel through which current flows.

Channel Length and Width

The channel length L is the horizontal distance between the source and drain junctions, directly beneath the gate. The channel width W is the dimension perpendicular to current flow. Both parameters appear in every MOSFET drain current formula. The ratio W/L, called the aspect ratio, directly determines the drive current capability of the device. A wider and shorter channel gives higher current for the same gate voltage overdrive.

The body terminal, connected to the substrate, plays an important role through the body effect. When the source and body are not at the same potential, the threshold voltage shifts. This is modeled by the body-effect coefficient gamma and is a frequently tested concept in GATE.

Mathematical Expression

The oxide capacitance per unit area Cox is calculated as Cox = epsilon_ox / t_ox. This value is fundamental because the total gate capacitance and the transconductance parameter kn = mu_n * Cox * (W/L) both depend on it. The process transconductance parameter kn' = mu_n * Cox is a technology-specific constant, and the device transconductance parameter kn = kn' * (W/L) is design-specific. These appear repeatedly in drain current and small-signal model calculations.

Practical Understanding

In practice, MOSFETs are fabricated using CMOS technology where both n-channel and p-channel devices coexist on the same chip. The substrate for NMOS is p-type, while PMOS devices are built in n-type wells. The oxide thickness must be uniform across the wafer because non-uniformity directly causes variation in threshold voltage, which can cause logic failures in digital circuits.

The four-terminal nature of the MOSFET is important in circuit analysis. While the body is often connected to the most negative supply in NMOS, treating it as a separate terminal enables more accurate models, especially in analog design where body-effect-induced threshold shifts can alter bias conditions significantly.

Example
Given:
Gate oxide thickness t_ox = 5 nm = 5 x 10^-9 m
Permittivity of SiO2: epsilon_ox = 3.9 x 8.854 x 10^-12 F/m = 3.45 x 10^-11 F/m

Why this formula applies:
Cox relates the gate insulator geometry to its capacitive control over the channel charge.

Formula:
Cox = epsilon_ox / t_ox

Substitution:
Cox = (3.45 x 10^-11) / (5 x 10^-9)

Calculation:
Cox = 6.9 x 10^-3 F/m^2
     = 6.9 mF/m^2

Final Answer:
Cox = 6.9 mF/m^2
This means each square meter of gate area stores 6.9 mC of charge per volt of gate voltage applied.
Exam Tip: GATE frequently asks you to calculate Cox or kn given t_ox and W/L. Remember epsilon_ox = 3.9 * 8.854e-12 F/m. The body effect equation delta_VT = gamma*(sqrt(|2*phi_F + V_SB|) - sqrt(|2*phi_F|)) is a common trap - do not forget the square root difference form.
MOSFET Layer Stack and Terminal Functionsp-type Substrate (Body B) - provides isolationDepletion region forms here when VGS appliedInversion Layer (Channel) - electrons when VGS > VTGate Oxide SiO2 (insulating, thickness t_ox)Polysilicon Gate Electroden+ Sourcen+ DrainSDGBLayers(top tobottom)
Figure 2: MOSFET layer-by-layer breakdown showing how each region contributes to device operation
  • Gate electrode applies electric field through thin SiO2 oxide to control channel charge density.
  • Source and drain are n+ doped regions; source is reference terminal (VSS in digital circuits).
  • Channel forms at oxide-semiconductor interface when VGS exceeds threshold voltage VT.
  • Body (substrate) connection affects threshold voltage through body effect when VSB is non-zero.
  • Channel length L and width W together determine current drive capability through aspect ratio W/L.

Quick Revision

  • MOSFET has four terminals: Gate (G), Source (S), Drain (D), Body (B).
  • Gate is insulated from channel by SiO2 oxide, giving virtually infinite DC input impedance.
  • Cox = epsilon_ox / t_ox is oxide capacitance per unit area; kn' = mu_n * Cox is process transconductance.
  • Channel length L is between junctions; W/L aspect ratio sets drive current capability.
  • Inversion layer (channel) forms when VGS > VT; this connects source and drain electrically.
  • Body effect: threshold voltage VT increases when source-body reverse bias VSB increases.
  • Exam trap: Cox is in F/m^2 not F; kn = kn' * (W/L) has units A/V^2.

MOSFET Structure Quiz

Test your knowledge of MOSFET gate, oxide, and channel structural parameters.

Question 1 of 3

Q1.The oxide capacitance per unit area C_ox is given by epsilon_ox / t_ox. Reducing t_ox from 10nm to 5nm will: