Power MOSFETs

Power MOSFETs are voltage-controlled switching devices designed for high-speed, high-current applications in power electronics. Unlike small-signal MOSFETs that use a lateral channel, power MOSFETs employ a vertical current flow structure that allows them to handle hundreds of amperes and several hundred volts. They are the preferred switch in switch-mode power supplies, motor drives, and DC-DC converters due to their fast switching speed and ease of gate drive.

Core Concept Explanation

The defining structural feature of a power MOSFET is its vertical current flow path. In a standard lateral MOSFET, source and drain are on the same surface, limiting current density. In a power MOSFET, the drain terminal is at the bottom of the die (the substrate), while the source and gate are on the top surface. Current flows vertically through the device, allowing a large cross-sectional area for current conduction.

The DMOS (Double-diffused MOS) structure uses two sequential diffusions to create the P-body region inside the N-drift layer. The channel forms laterally inside the P-body between the N+ source and the N-drift region. When the gate voltage exceeds the threshold voltage VGS(th), an inversion layer (n-channel) forms along the gate oxide under the P-body, connecting source to drain and allowing current to flow vertically downward through the N-drift region to the N+ drain.

The most critical on-state parameter is RDS(on), the drain-to-source resistance when fully on. It determines conduction loss as P = I2 x RDS(on). RDS(on) increases significantly with temperature, roughly doubling from 25 degrees C to 150 degrees C. This self-limiting behavior actually aids current sharing when multiple MOSFETs are connected in parallel. It also increases with breakdown voltage rating because higher blocking voltage requires a thicker, more lightly doped N-drift region.

Mathematical Expression

RDS(on) is the dominant loss parameter in power MOSFETs. For a device with breakdown voltage VBR, the minimum achievable RDS(on) scales approximately as:

RDS(on) is proportional to VBR raised to the power of approximately 2.5 for silicon devices. This is the fundamental silicon limit, meaning that higher voltage MOSFETs inherently have higher RDS(on) for the same die area. Wide bandgap materials like SiC and GaN break this limit significantly. The gate charge QG determines switching losses. Total gate drive energy per cycle = QG x VGS. Switching loss = QG x VGS x VDD x f, where f is switching frequency.

Practical Understanding

Every power MOSFET contains an inherent body diode formed by the P-body and N-drift junction. This diode is in antiparallel with the MOSFET, connecting from source to drain (anode at source, cathode at drain for an n-channel device). It conducts during dead time in half-bridge circuits when neither switch is on. The body diode has slow reverse recovery, which can cause shoot-through currents. External fast recovery diodes are sometimes added in series or parallel to manage this.

Gate drive design must account for the input capacitance Ciss and gate charge QG. Unlike a BJT, no continuous gate current is needed in steady state. However, a low-impedance gate driver is needed to charge and discharge Ciss quickly for fast switching. The gate resistor RG controls switching speed and must balance between switching speed, EMI, and safe dv/dt limits.

Given:
ID = 10 A (drain current), RDS(on) = 0.05 Ω at 25°C
Temperature coefficient: RDS(on) doubles at 150°C
Switching frequency f = 100 kHz, QG = 30 nC, VGS = 12 V, VDD = 100 V

Why this formula applies:
Conduction loss and switching loss are the two main loss components in a power MOSFET.

Formula:
P_cond = ID^2 x RDS(on)
P_sw = QG x VGS x VDD x f

Substitution:
P_cond = 10^2 x 0.05 = 100 x 0.05
P_sw = 30e-9 x 12 x 100 x 100e3

Calculation:
P_cond = 5 W (at 25°C), approximately 10 W at 150°C due to RDS(on) doubling
P_sw = 30e-9 x 12 x 100 x 1e5 = 3.6 W

Final Answer:
Conduction loss = 5 W (25°C) to 10 W (150°C), Switching loss = 3.6 W, Total ~ 8.6 to 13.6 W.

Exam Tip: RDS(on) increases with temperature (positive temperature coefficient), which is why parallel MOSFETs share current automatically. GATE often asks to compare conduction loss versus switching loss as frequency changes. P_cond is independent of f; P_sw scales linearly with f.

• Vertical current path through N-drift region allows high current density and high blocking voltage simultaneously.
• DMOS process creates channel in P-body between N+ source and N-drift, controlled by gate voltage.
• RDS(on) has positive temperature coefficient, enabling natural current sharing in parallel configurations.
• Body diode conducts during dead time in bridge circuits but has slow reverse recovery that can cause losses.
• Total loss = conduction loss (ID2 x RDS(on)) + switching loss (QG x VGS x VDD x f).

Quick Revision

• Power MOSFET uses vertical DMOS structure; drain is at bottom, source and gate at top surface.
• RDS(on) determines conduction loss: P = I2 x RDS(on). It increases with temperature (doubles from 25 to 150 degrees C).
• Switching loss: P_sw = QG x VGS x VDD x f. Increases linearly with frequency.
• Body diode is antiparallel, anode at source, cathode at drain for n-channel MOSFET.
• Silicon limit: RDS(on) proportional to VBR^2.5. SiC and GaN MOSFETs bypass this limit.
• GATE trap: MOSFETs are voltage-controlled (no DC gate current), but switching requires gate charge QG. Larger QG means slower switching and higher drive loss.