Thyristors

A thyristor, commonly known as the Silicon Controlled Rectifier (SCR), is a four-layer PNPN semiconductor device that acts as a bistable switch. It can be triggered into conduction by a small gate pulse and once on, it continues to conduct regardless of gate signal until the current falls below a minimum holding level. This latching behavior makes thyristors uniquely suited for AC power control, controlled rectifiers, and high-power switching applications where their ability to handle thousands of volts and thousands of amperes in a single device is unmatched.

Core Concept Explanation

The thyristor consists of four alternating semiconductor layers: P1-N1-P2-N2 from anode to cathode. It contains three p-n junctions: J1 (P1-N1), J2 (N1-P2), and J3 (P2-N2). When forward voltage is applied (anode positive with respect to cathode), J1 and J3 are forward biased while J2 is reverse biased. The device is in the forward blocking state. The small gate terminal is attached to the P2 layer.

The two-transistor analogy is the key to understanding the thyristor. The four-layer structure can be split into a PNP transistor (Q1: P1-N1-P2) and an NPN transistor (Q2: N1-P2-N2). The collector of Q1 is connected to the base of Q2, and the collector of Q2 is connected to the base of Q1. This forms a positive feedback loop. The gate is the external base terminal of Q2.

When a positive gate pulse injects current into Q2 base, Q2 starts to conduct. Q2 collector current flows into Q1 base, turning on Q1. Q1 collector current then reinforces Q2 base current. This is regenerative feedback, also called the alpha summation criterion. The condition for sustained conduction is alpha1 + alpha2 greater than or equal to 1, where alpha1 and alpha2 are the common-base current gains of Q1 and Q2 respectively. Once this condition is met, the gate current is no longer needed; the device latches on.

Once latched, the thyristor can only be turned off by reducing the anode current below the holding current IH, which is the minimum current needed to sustain the regenerative loop. In AC circuits, this happens naturally every half cycle when the supply reverses. In DC circuits, forced commutation techniques are required, which adds significant circuit complexity.

Mathematical Expression

The turn-on condition based on the two-transistor model is expressed through the common-base current gains. For the device to enter regenerative conduction:

alpha1 + alpha2 greater than or equal to 1. The anode current IA = (ICBO1 + ICBO2) / (1 - alpha1 - alpha2), where ICBO1 and ICBO2 are the reverse leakage currents of Q1 and Q2. As IA increases, alpha values increase (due to BJT gain increasing with collector current at low levels). When alpha1 + alpha2 reaches unity, IA theoretically approaches infinity, representing the latching condition. The latching current IL is the minimum anode current required to maintain conduction after gate pulse removal, while holding current IH is slightly lower, the minimum to keep the device on.

Practical Understanding

In a single-phase half-wave controlled rectifier, the SCR is in series with the AC supply and load. By controlling the firing angle alpha (the delay from the zero-crossing of AC supply to the gate trigger pulse), the average output voltage can be controlled. For a resistive load, the average output voltage Vdc = (Vm / 2*pi) x (1 + cos(alpha)), where Vm is the peak supply voltage.

The dv/dt turn-on is an important failure mode. If the rate of rise of forward voltage across the SCR is too high, the displacement current through the J2 capacitance can trigger the device without a gate signal. Snubber RC circuits across the SCR limit dv/dt to safe values. Similarly, a di/dt limiter (series inductor) is used to prevent excessive current rise at turn-on, which could locally destroy the device before current spreads over the full die area.

Given:
Single-phase half-wave controlled rectifier
Vs = 230 V RMS, firing angle alpha = 60 degrees, resistive load R = 20 Ω

Why this formula applies:
For half-wave SCR rectifier with resistive load, average output voltage depends on firing angle.

Formula:
Vm = sqrt(2) x Vs
Vdc = (Vm / 2π) x (1 + cos(α))
Idc = Vdc / R

Substitution:
Vm = 1.414 x 230 = 325.2 V
Vdc = (325.2 / 6.283) x (1 + cos(60°))
 = (325.2 / 6.283) x (1 + 0.5)
Idc = Vdc / 20

Calculation:
Vdc = 51.76 x 1.5 = 77.64 V
Idc = 77.64 / 20 = 3.88 A

Final Answer:
Average output voltage Vdc = 77.64 V, Average output current Idc = 3.88 A.

Exam Tip: For half-wave SCR rectifier with R load, Vdc = (Vm/2π)(1 + cos α). For full-wave, Vdc = (Vm/π)(1 + cos α). At alpha = 0, half-wave gives Vm/π (same as uncontrolled). At alpha = 90 degrees, Vdc = Vm/2π. Memorize both formulas for GATE.

• Gate pulse at firing angle alpha triggers the SCR into conduction by satisfying alpha1 + alpha2 greater than or equal to 1.
• Once on, gate loses control; current must drop below IH to turn off the thyristor.
• Increasing firing angle alpha delays conduction and reduces average output voltage Vdc.
• dv/dt protection using snubber circuits prevents false triggering through J2 capacitive displacement current.
• di/dt limiting using series inductance prevents local overheating at turn-on before current spreads over the die.

Quick Revision

• SCR is a PNPN four-layer device: three junctions J1, J2, J3. Gate is at P2 layer.
• Turn-on condition: alpha1 + alpha2 greater than or equal to 1 via regenerative feedback of PNP (Q1) and NPN (Q2) transistors.
• Holding current IH: minimum current to sustain conduction. Latching current IL: minimum to stay on after gate removal (IL > IH).
• Half-wave SCR rectifier: Vdc = (Vm/2π)(1 + cos α). Full-wave: Vdc = (Vm/π)(1 + cos α).
• Turn-off in DC circuits requires forced commutation. In AC circuits, natural commutation occurs at current zero crossing.
• GATE trap: SCR can also be triggered by high dv/dt or high temperature without gate pulse. This is an undesirable false triggering. Snubber circuit prevents it.
• SCR cannot be turned off by gate. Only by anode current falling below IH or by applying reverse voltage (forced commutation).