Short notes

Delta Modulation Short Notes

When a TLC7524 DAC is used inside a simple delta modulation encoder clocked at 32 kHz, the output staircase chases a voice waveform one step at a time — either up or down by a fixed voltage δ per clock cycle. This 1-bit quantisation approach is attractive because the transmitter circuit is far simpler than an 8-bit PCM codec, though it struggles when the input signal rises faster than δ × fs.

ECE, EI

How it works

Each clock cycle, a comparator checks whether the input exceeds the previous approximation. If yes, the integrator steps up by δ; if no, it steps down. The single-bit output — 1 or 0 — is transmitted. Two noise sources dominate: slope overload distortion occurs when the signal slope exceeds δ·fs, and granular noise appears during slow or flat signal segments as the staircase hunts around the true value. Adaptive DM (ADM) varies δ dynamically to reduce both. The minimum step size condition to avoid slope overload is δ ≥ (2π·fm·A) / fs, where A is the signal amplitude and fm is the message frequency.

Key points to remember

Delta modulation uses only 1 bit per sample, making it far simpler than PCM but inferior in SNR for the same bandwidth. Slope overload is the dominant distortion for high-frequency, large-amplitude inputs. The sampling rate fs must be much higher than Nyquist — typically 4× to 8× — to keep granular noise acceptable. Adaptive delta modulation (ADM) used in systems like CVSD varies the step size to improve dynamic range. Unlike PCM, DM has no separate quantisation and encoding steps, which is a key exam distinction.

Exam tip

Every VTU and Anna University paper has at least one question asking you to sketch the DM waveform for a given sinusoidal input and identify which samples cause slope overload — practise drawing it with at least 10 clock cycles.

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