How it works
The seven basic gates: AND (output high only when all inputs high), OR (output high when any input high), NOT/inverter (output is complement of input), NAND (AND followed by NOT), NOR (OR followed by NOT), XOR (output high when inputs differ), XNOR (output high when inputs are same). NAND and NOR are universal gates — any Boolean function can be realised using only NAND gates or only NOR gates. To implement AND using NAND: (AB)' inverted = AB, requiring two NAND gates. De Morgan's law directly maps: NAND(A,B) = A'+B', NOR(A,B) = A'·B'. In TTL (74-series), logic high is 2–5 V and logic low is 0–0.8 V; fan-out is typically 10. In CMOS (74HC-series), logic levels track supply voltage (0 to VCC), power consumption is extremely low in static operation, and fan-out is much higher.
Key points to remember
NAND and NOR are universal — every logic function can be built from either alone. XOR produces 1 when inputs differ: A⊕B = A'B + AB'; it is the building block of adders and parity checkers. XNOR is the equality detector: output is 1 when A = B. TTL logic family: VIH(min) = 2 V, VIL(max) = 0.8 V, VOH(min) = 2.4 V, VOL(max) = 0.4 V; noise margin = 0.4 V. CMOS 74HC family: VIH = 0.7VDD, VIL = 0.3VDD; static power dissipation is negligible (nanowatts), dynamic power = CV²DDf. Propagation delay of 74HC00 is approximately 8 ns, much faster than older 4000-series CMOS (90 ns).
Exam tip
The examiner always asks you to realise a basic gate (AND, OR, NOT) using only NAND gates or only NOR gates — draw the gate diagram, apply De Morgan's law to verify, and state why NAND/NOR are called universal gates.