How it works
In protected mode, the segment registers no longer hold base addresses directly — they hold 16-bit selectors. Each selector contains a 13-bit index into a descriptor table, a Table Indicator bit (0 = GDT, 1 = LDT), and a 2-bit RPL (Requested Privilege Level). The Global Descriptor Table (GDT) is shared across all tasks; the Local Descriptor Table (LDT) is per-task. Each descriptor is 8 bytes and contains a 24-bit base, a 20-bit limit, and access byte fields including DPL (Descriptor Privilege Level). The four privilege rings are 0 (kernel) to 3 (user); a violation raises a General Protection Fault.
Key points to remember
Protected mode on the 80286 extends the address space to 16 MB (24-bit physical bus), while 80386 protected mode reaches 4 GB with 32-bit registers. The GDT can hold up to 8,192 descriptors, as can the LDT. Switching from real to protected mode requires setting bit 0 (PE bit) of the CR0 control register. Unlike real mode, segments cannot overlap arbitrarily — the limit field in the descriptor enforces a hard boundary. Task State Segments (TSS) store the CPU context during hardware task switching, which is a favourite 2-mark question topic.
Exam tip
The examiner always asks you to draw the format of an 80286 segment descriptor and label every field — base, limit, access byte, DPL — so sketch it from memory at least twice before your exam.