Short notes

8086 Segment Registers Short Notes

When you write a simple MOV AX, [2000H] instruction on an 8086 trainer kit, the processor does not just fetch from address 2000H — it secretly adds the Data Segment register DS shifted left by 4 bits to form the 20-bit physical address. This segmented addressing scheme is why the 8086 can reach 1 MB of memory using only 16-bit internal registers, and understanding which segment register is active for which type of access is exactly what Anna University tests in Part-B.

EEE, ECE, EI

How it works

The 8086 has four dedicated segment registers: CS holds the base of the current code segment, DS points to the default data segment, SS defines the stack base, and ES is the extra segment used mainly by string instructions like MOVSB. Physical Address = (Segment Register × 16) + Offset Register. CS pairs with IP for instruction fetch; DS pairs with BX, SI, or DI for data; SS pairs with SP and BP for stack operations. Segment override prefixes such as ES: or SS: let instructions explicitly use a non-default segment. Each segment can be up to 64 KB in size.

Key points to remember

Each segment register is 16 bits wide, and the physical address formed is always 20 bits, giving a 1 MB address space. The formula Physical Address = Segment × 10H + Offset must be written correctly in exams — the ×10H means a left-shift by 4 bits, not multiplication by 10 decimal. Segments can overlap completely or partially; there is no hardware enforcement of separation in real mode. String instructions LODS, STOS, MOVS default to DS:SI as source and ES:DI as destination. SP always works with SS without any override needed.

Exam tip

The examiner always asks you to calculate the physical address given CS = 1234H and IP = 0100H — the answer is 12440H, not 1334H, so double-check your hex addition every time.

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