How it works
The 8253 has three independent 16-bit down-counters, each with CLK, GATE, and OUT pins. Control word format: D7D6 select counter (00, 01, 10), D5D4 select read/load mode (11 = LSB then MSB), D3D2D1 select operating mode (000–101), D0 selects binary (0) or BCD (1) counting. Mode 0: interrupt on terminal count (OUT goes HIGH when count reaches 0). Mode 1: hardware retriggerable monoshot. Mode 2: rate generator (OUT LOW for one clock period per count cycle, frequency = CLK/N). Mode 3: square wave generator (OUT HIGH for N/2 clocks, LOW for N/2 clocks). Mode 4: software triggered strobe. Mode 5: hardware triggered strobe.
Key points to remember
Mode 2 and Mode 3 are the most examined: Mode 2 gives asymmetric pulses (one CLK wide LOW pulse every N clocks); Mode 3 gives symmetric square wave at CLK/N. For odd count N in Mode 3, the HIGH period is (N+1)/2 clocks and LOW is (N−1)/2 clocks. GATE pin controls counting: for modes 0, 2, 3, GATE HIGH enables counting and GATE LOW pauses it. For mode 1, a LOW-to-HIGH GATE edge triggers the monoshot. The 8254 is the enhanced version of 8253 with read-back command for latching count and status simultaneously. Clock frequency for 8253 is maximum 2 MHz; 8254 goes up to 8 MHz.
Exam tip
Every Anna University paper asks you to write the control word and initialisation code for an 8253 generating a specific frequency using mode 2 or mode 3 — calculate N = f_CLK/f_OUT, convert to hex, and show the two OUT instructions (control word then count value) with port addresses.