8085 Instruction Set Interview Questions

Q1. How are 8085 instructions classified?

8085 instructions are classified into five groups: data transfer (MOV, MVI, LDA, STA, LHLD, SHLD), arithmetic (ADD, SUB, INR, DCR, DAD), logical (ANA, ORA, XRA, CMP, RLC, RAR), branch (JMP, JZ, JC, CALL, RET), and machine control (HLT, NOP, RIM, SIM, EI, DI). The MOV family is the largest because the 8085 has six general-purpose registers plus memory, giving 49 possible register-to-register and register-to-memory transfer combinations. Machine control instructions like EI and DI are commonly overlooked but are critical for interrupt-driven code.

Follow-up: Which instruction group does not affect the flag register at all?

Q2. What is the difference between MOV and MVI instructions?

MOV transfers data between two registers or between a register and memory at address (HL), while MVI loads an 8-bit immediate constant directly into a register or memory location. MOV B, C copies the content of register C into register B using 1 byte and takes 4 T-states, whereas MVI B, 25H loads the value 25H into B using 2 bytes (opcode + immediate data) and takes 7 T-states. This distinction matters when writing tight timing loops where the extra T-state cost of MVI can throw off a delay calculation.

Follow-up: How many bytes and T-states does MOV M, A take?

Q3. What is the difference between LDA and LDAX instructions?

LDA loads the accumulator from a memory address specified as a 16-bit immediate operand in the instruction itself, while LDAX loads the accumulator from the memory address held in register pair BC or DE at the time of execution. LDA 2050H fetches the byte stored at address 2050H regardless of register contents, whereas LDAX B fetches from whatever address is currently in BC, making LDAX useful for iterating through an array. LDA is 3 bytes long, LDAX is 1 byte.

Follow-up: Can LDAX use the HL register pair? Why or why not?

Q4. What does the XCHG instruction do?

XCHG swaps the contents of the HL register pair with the DE register pair in a single 1-byte, 4-T-state operation without using any temporary register or memory. In sorting or string copy routines, you might have the source pointer in HL and need to exchange it with the destination pointer in DE; XCHG does this atomically in one instruction instead of three moves through a temporary. There is no equivalent instruction to swap HL with BC, which requires a three-instruction sequence.

Follow-up: How would you swap the contents of HL and BC without using any other register?

Q5. What is the DAD instruction and what flag does it affect?

DAD (Double Add) adds a 16-bit register pair to the HL pair and stores the 16-bit result in HL, affecting only the Carry flag if the 16-bit addition overflows. DAD B adds BC to HL; if HL = 1000H and BC = F500H, the result in HL is 0500H and Carry is set. DAD is the only 16-bit arithmetic instruction in the 8085 set, so all 16-bit additions go through HL, making HL the implicit accumulator for pointer arithmetic.

Follow-up: How would you perform 16-bit subtraction on the 8085 since there is no DSUB instruction?

Q6. What is the difference between ADD and ADC instructions?

ADD adds a register or memory byte to the accumulator ignoring the current Carry flag, while ADC (Add with Carry) adds the register or memory byte plus the current Carry flag bit to the accumulator. To add two 16-bit numbers stored in BC and DE using 8-bit operations, you first use ADD for the low bytes and then ADC for the high bytes so the carry from the low byte addition propagates correctly. Forgetting to use ADC for the high byte is one of the most common bugs in multi-byte 8085 arithmetic programs.

Follow-up: Write the 4-instruction sequence to add the 16-bit number in BC to the 16-bit number in DE.

Q7. What does the CMP instruction do and how do you interpret its result?

CMP performs a subtraction of the operand from the accumulator without storing the result, setting the Sign, Zero, Carry, and other flags based on the subtracted value so you can branch on the comparison outcome. After CMP B, if the Zero flag is set, A equals B; if Carry is set, A is less than B (unsigned); if neither flag is set, A is greater than B. CMP is always followed by a conditional jump instruction — JZ, JC, JNC — because the flags are meaningless without subsequent branching.

Follow-up: What is the difference between CMP and CPI?

Q8. What is the function of the PUSH and POP instructions?

PUSH saves a 16-bit register pair onto the stack at the address pointed to by SP-1 and SP-2, then decrements SP by 2; POP reads two bytes from the stack at the address in SP and SP+1 into a register pair and then increments SP by 2. PUSH B saves register C at address SP-1 and register B at SP-2, so B is at the lower address. PUSH PSW saves the accumulator and flag register together, which is the standard way to preserve the full CPU state in an interrupt service routine.

Follow-up: Why must every PUSH in an interrupt service routine be matched by a POP before the RETI instruction?

Q9. What is the CALL instruction and how does it differ from JMP?

CALL saves the address of the instruction immediately following it onto the stack and then jumps to the called subroutine address, while JMP simply loads the program counter with the target address and loses track of where it came from. CALL 2000H pushes the return address (the address after the CALL bytes) onto the stack as a 16-bit value, then sets PC to 2000H; the RET at the end of the subroutine pops this address back into PC. Without CALL and RET, every subroutine call would require the programmer to manually save and restore the return address.

Follow-up: How many bytes does CALL push onto the stack?

Q10. What are the conditional CALL and RETURN instructions in the 8085?

The 8085 has eight conditional CALL instructions (CC, CNC, CZ, CNZ, CM, CP, CPE, CPO) and matching conditional RETURN instructions (RC, RNC, RZ, RNZ, RM, RP, RPE, RPO), one pair for each of the four testable flags in two states. A conditional CALL like CZ 3000H calls the subroutine only if the Zero flag is set, saving the return address on the stack only when the call is actually taken. Conditional RETs are powerful for creating subroutines that exit early based on error conditions without a JMP to the standard exit point.

Follow-up: How many T-states does a conditional CALL take when the condition is not met versus when it is met?

Q11. What is the XTHL instruction?

XTHL swaps the contents of the HL pair with the top two bytes of the stack — H swaps with the byte at SP+1 and L swaps with the byte at SP — and is a 1-byte instruction. In interrupt handlers, XTHL can be used to temporarily swap a pointer into HL while preserving the original stack top without an extra POP and PUSH sequence. XTHL is among the most obscure 8085 instructions but appears in interview questions specifically to test whether candidates have read beyond the commonly used instruction subset.

Follow-up: What is the equivalent multi-instruction sequence that achieves the same result as XTHL?

Q12. What does the RLC instruction do and how does it differ from RAL?

RLC rotates the accumulator left by one bit with the outgoing bit D7 going to both the Carry flag and the vacated D0 position, while RAL rotates left through the Carry flag — D7 goes to Carry and the old Carry enters D0. After RLC on accumulator value 85H (10000101B), the result is 0BH (00001011B) and Carry is set to 1. RAL on 85H with Carry = 0 gives 0AH (00001010B) and Carry = 1 — the D0 bit receives 0 from the old Carry rather than the outgoing D7.

Follow-up: How many RLC instructions are needed to check if bit 3 of the accumulator is set?

Q13. What is the NOP instruction and when is it deliberately used?

NOP performs no operation, takes 4 T-states, and advances the PC by 1, making it useful for generating precise software timing delays, reserving memory for future instruction patching in ROM, and padding code to align instructions on specific addresses. In an 8085 delay loop, adding NOP instructions stretches the loop body by 1.33 µs per NOP at 3 MHz, allowing fine-grained adjustment of delay duration. In production ROM systems, unused memory is sometimes filled with NOPs so that runaway code eventually reaches a valid section rather than executing random opcodes.

Follow-up: Why would a programmer fill empty ROM space with NOPs rather than zeros or FFH?

Q14. What is the HLT instruction and what state does the 8085 enter?

HLT stops instruction execution and places the 8085 in a halted state where it floats the data bus and keeps the address bus at the HLT instruction address plus one, waiting for a RESET or unmasked interrupt to resume. In simple single-board computers like the SDK-85, HLT at the end of a program signals that execution is complete and the result is ready for inspection. The 8085 can be pulled out of HALT by any unmasked interrupt, after which it services the interrupt and returns to the instruction after HLT.

Follow-up: What is the difference between HLT and the HOLD state?

Q15. What is the purpose of the EI and DI instructions?

EI (Enable Interrupts) sets the interrupt enable flip-flop so the 8085 can respond to INTR, RST, and TRAP interrupts, while DI (Disable Interrupts) clears it to prevent all maskable interrupts. The 8085 automatically disables interrupts when it acknowledges any interrupt, so the interrupt service routine must execute EI before its RET if nested interrupts or re-enabling after service is required. DI is critical around critical sections — shared data structures that would be corrupted by an interrupt handler modifying them mid-update.

Follow-up: Is TRAP affected by the DI instruction?