Interview questions & answers
Q1. What is a multiplexer and how does it differ from a demultiplexer?
A multiplexer selects one of N data inputs and routes it to a single output based on binary select lines, while a demultiplexer takes one input and routes it to one of N outputs based on select lines. A 74HC151 8-to-1 MUX uses three select lines to choose among 8 inputs, whereas a 74HC138 routes one enable signal to one of 8 outputs. In communication systems, a MUX combines multiple channels onto one line and a DEMUX splits them back out at the receiver.
Follow-up: What is the minimum number of select lines needed for a 16-to-1 multiplexer?
Q2. How do you implement a 4-to-1 MUX using logic gates?
Use four 3-input AND gates, each gated by a unique combination of the two select lines S1 and S0 and their complements, then OR all four AND outputs together. Input I0 passes when S1=0, S0=0; I1 when S1=0, S0=1; I2 when S1=1, S0=0; and I3 when S1=1, S0=1. Building a 4-to-1 MUX from gates requires 2 inverters, 4 AND gates, and 1 four-input OR gate, which is exactly how a 74HC153 is structured internally.
Follow-up: How would you expand this gate-level implementation to a 8-to-1 MUX?
Q3. How can a multiplexer implement any Boolean function?
Connect the function's minterm values (0 or 1) to the corresponding data inputs of a 2^n-to-1 MUX where n equals the number of input variables; the select lines take the input variable values to route the correct constant to the output. A 74HC151 8-to-1 MUX can implement any 3-variable Boolean function by wiring its 8 data inputs to the truth table output column. This technique directly converts a truth table to hardware without algebraic simplification.
Follow-up: How would you use a 4-to-1 MUX to implement a 4-variable Boolean function?
Q4. What is the difference between a 74HC151 and a 74HC153?
The 74HC151 is a single 8-to-1 MUX with three select lines and one output, while the 74HC153 contains two independent 4-to-1 MUXes in one package, sharing the same two select lines but with separate data inputs and outputs. The 74HC153 is preferred when you need to route two independent signals simultaneously with the same select code, such as in ALU operand selection. Both ICs have an active-low enable pin that disables all outputs when deasserted.
Follow-up: How do the shared select lines of the 74HC153 affect its use in a system where the two channels need different routing?
Q5. How is a 74HC138 3-to-8 decoder used as a demultiplexer?
Apply the data signal to one of the three active-low enable inputs (G2A or G2B) while using A, B, C as select lines; only the selected output goes low when enable is asserted, routing the data signal to that output. A 74HC138 used as a DEMUX with A=1, B=0, C=0 routes the enable signal to output Y1 only. This is exactly how address decoders in microprocessor memory maps route chip select signals to individual memory ICs.
Follow-up: What is the logic level at the non-selected outputs of a 74HC138 acting as a DEMUX?
Q6. What is time-division multiplexing and how are MUX ICs used in it?
TDM assigns each input channel a fixed time slot by rapidly cycling the select lines of a MUX so each input appears on the output for one slot period, combining all channels onto one serial stream. A 74HC151 with its select lines driven by a 3-bit counter samples each of 8 analog or digital channels in sequence at a rate set by the counter clock. T1/E1 telephony systems use this principle to combine 24 or 30 PCM voice channels onto a single 1.544 Mbps or 2.048 Mbps line.
Follow-up: How does the channel sampling rate relate to the counter clock frequency in a TDM system using a 74HC151?
Q7. How do you build a 16-to-1 MUX using two 74HC151 ICs?
Connect the outputs of both 74HC151 ICs to a 2-to-1 MUX; use the same A, B, C select lines for both ICs while the fourth select line D enables one IC and disables the other via their enable pins. When D=0 the first 74HC151 is active selecting from inputs I0–I7; when D=1 the second is active selecting from I8–I15. This hierarchical expansion technique is standard in FPGA routing switch boxes.
Follow-up: What is the propagation delay of the expanded 16-to-1 MUX compared to a single 74HC151?
Q8. What is an analog multiplexer and how does it differ from a digital MUX?
An analog multiplexer routes one of several analog voltage signals to a single output using CMOS transmission gates, whereas a digital MUX routes logic-level signals using standard logic gates and cannot handle voltages outside the logic supply rails. The CD4051 is an 8-channel analog MUX/DEMUX that passes signals from 0 V to VDD bidirectionally with an on-resistance of about 80 ohms at 5V. Analog MUXes are used in data acquisition systems to share one ADC among multiple sensor channels.
Follow-up: How does the on-resistance of an analog MUX affect measurement accuracy in a sensor interface circuit?
Q9. How does a MUX tree reduce the wiring complexity in large digital systems?
A MUX tree uses a cascade of smaller MUXes where the outputs of the first level feed the inputs of the second level, requiring far fewer total select lines than a flat N-to-1 MUX for large N. Selecting one of 64 inputs using a tree of 8-to-1 MUXes requires two levels and only 6 select lines total versus 64 individual wires. This architecture is fundamental to the interconnect fabric inside FPGAs, where thousands of logic outputs must be routed to thousands of logic inputs.
Follow-up: What is the total propagation delay through a two-level MUX tree compared to a single 64-to-1 MUX?
Q10. How is a MUX used in a data selector application?
A MUX acts as a data selector by applying the address of the desired data source to the select pins; the MUX then presents that source's data on the output, effectively switching between multiple registers, buses, or sensor channels. In a microcontroller ADC, a 74HC4051 analog MUX selects which of 8 sensor inputs connects to the ADC's single input channel based on 3 bits written to a control register. This is how all multi-channel ADC peripheral MUXes inside STM32 and PIC microcontrollers work.
Follow-up: What setup time must be respected between changing the MUX select lines and starting an ADC conversion?
Q11. What is a priority encoder and how does it relate to MUX design?
A priority encoder accepts multiple simultaneous active inputs and outputs the binary address of the highest-priority active input, essentially performing the inverse operation of a DEMUX. The 74HC148 8-to-3 priority encoder produces the 3-bit address corresponding to the highest active of its 8 inputs. In interrupt controllers like the 8259A PIC, priority encoders determine which interrupt request gets serviced when multiple requests arrive simultaneously.
Follow-up: What happens at the output of a 74HC148 when none of its inputs are active?
Q12. How do you use a 2-to-4 decoder as a 1-to-4 demultiplexer?
Connect the data input to the active-low enable pin of the 74HC139 2-to-4 decoder and use the A and B select inputs to choose the output line; the selected output follows the complement of the data input while all others stay high. When data is logic-0 (asserted) and A=1, B=0, output Y2 goes low and all others stay high. This dual use of decoders as DEMUXes is common in memory bank switching and I/O address decoding circuits.
Follow-up: What is the active output polarity of a 74HC139 used as a DEMUX and how do you invert it if needed?
Q13. What is the role of the strobe or enable pin in a MUX IC?
The strobe/enable pin gates all outputs simultaneously; in a 74HC151, asserting the active-low enable passes the selected input to the output, while deasserting forces the output to logic-0 regardless of select lines. This allows multiple MUX ICs to be OR-wired together in an expansion configuration where only one is enabled at a time. In bus arbitration circuits, the strobe pin prevents bus contention by ensuring only one MUX drives the shared line.
Follow-up: How would improper use of the strobe pin cause bus contention in a multi-MUX system?
Q14. How is frequency-division multiplexing different from time-division multiplexing?
FDM assigns each channel a unique carrier frequency band so all channels transmit simultaneously on the shared medium, while TDM assigns each channel a unique time slot so channels share the medium sequentially. Cable TV uses FDM to carry hundreds of channels simultaneously on one coaxial cable, each channel modulated onto a different RF carrier. TDM is used in digital telephony (T1/E1) and USB, where channel sharing is time-based rather than frequency-based.
Follow-up: What type of multiplexing does LTE use, and how does it combine concepts from both FDM and TDM?
Q15. How does a MUX reduce pin count in a microcontroller interfacing multiple devices?
By connecting multiple device data lines to a MUX's inputs and the MUX output to one MCU GPIO, the MCU reads any device by setting the MUX select lines to the corresponding address, reducing N GPIO pins to log2(N) select pins plus one data pin. A 74HC4051 allows one ADC pin on an Arduino to read 8 analog sensors using only 3 extra digital pins for selection. This technique is universally used in data logger circuits and industrial sensor hubs.
Follow-up: What is the maximum signal bandwidth that can be accurately read through a 74HC4051 analog MUX given its bandwidth specification?
Common misconceptions
Misconception: A decoder and a demultiplexer are different components that cannot substitute for each other.
Correct: A decoder with an enable input functions directly as a DEMUX when the data signal is applied to the enable pin.
Misconception: An analog multiplexer like the CD4051 can handle signals above its supply voltage.
Correct: Analog MUX input signals must stay within the 0 to VDD supply range; exceeding this damages the CMOS transmission gates.
Misconception: Increasing the number of MUX inputs always degrades speed proportionally.
Correct: A hierarchical MUX tree adds only one additional gate delay per level, not one per input, so a 64-to-1 tree is only two gate delays slower than an 8-to-1 MUX.
Misconception: A MUX select line directly addresses the output, like a DEMUX.
Correct: In a MUX, select lines address which INPUT is routed to the single output; in a DEMUX, select lines address which OUTPUT the single input is routed to.