Half and Full Bridge SMPS

High power applications.

Mohith N
Updated: 19 March 2026
9 min read

Switched-mode power supplies operating at high power levels demand converter topologies that can handle large voltages and currents without overstressing individual switching devices. The half-bridge and full-bridge SMPS topologies are the standard solutions for power levels ranging from a few hundred watts to several kilowatts, making them central to industrial power supplies, UPS systems, and motor drive input stages.

Half-Bridge SMPSFull-Bridge SMPSVdc+-S1S2C1C2TxHFRect+FilterVoutVin/2 per switchstressCenter-tapdrive neededVdc+-S1S3S2S4HF TxFull VinFull Vin acrosstransformer4 switchesHalf-Bridge uses 2 switches + 2 capacitors. Full-Bridge uses 4 switches for full voltage swing.
Figure 1: Half-Bridge vs Full-Bridge SMPS - Structural Comparison

Core Concept Explanation

In a forward converter or push-pull design, the transformer primary either sees half or the full DC bus voltage depending on how many switches are involved in the conduction path. The half-bridge topology places two switches in a totem-pole arrangement on one side of the transformer primary. Two series capacitors split the DC bus voltage so that each switch only ever blocks the full bus voltage but the transformer primary winding receives only Vin/2 per half cycle. This makes it suitable for medium power levels up to roughly 500 W to 1 kW.

The full-bridge topology uses four switches arranged as an H-bridge around the transformer primary. Diagonal switch pairs (S1-S4 and S2-S3) conduct alternately, so the full DC bus voltage appears across the transformer primary in both half-cycles. This doubles the volt-second product applied to the core compared to the half-bridge for the same bus voltage, enabling either a smaller transformer or higher output power for the same switch stress.

Both topologies operate with high-frequency switching typically in the range of 50 kHz to 500 kHz, which is what allows the transformer and filter components to be physically small. The switching frequency is controlled by a pulse-width modulation IC that adjusts duty cycle to regulate output voltage against load and input variations.

Mathematical Expression

The voltage conversion ratio for these isolated topologies is governed by the transformer turns ratio and the duty cycle. For the half-bridge, the average output voltage relates to input as:

Vout = (Ns / Np) x (Vin / 2) x 2D

where Ns and Np are the secondary and primary turns, and D is the duty cycle of each switch (maximum D approaches 0.5 to allow dead time). Simplifying:

Vout = (Ns / Np) x Vin x D

For the full-bridge, the full bus voltage drives the primary so:

Vout = (Ns / Np) x Vin x 2D

This shows that the full-bridge delivers twice the output for the same turns ratio and duty cycle compared to half-bridge, or equivalently achieves the same output with half the turns ratio. The peak switch current in full-bridge equals Pin / Vin whereas in half-bridge it equals 2 x Pin / Vin, meaning full-bridge switch current stress is lower for equal power.

Practical Understanding

The half-bridge design is simpler and requires only two gate drivers, but the capacitor voltage divider introduces a risk of volt-second imbalance if the two switch duty cycles are not exactly equal. This can saturate the transformer core. Practical designs use current-mode control or DC blocking capacitors in series with the primary to prevent this.

The full-bridge is preferred for power levels above 1 kW. It allows phase-shift modulation where all four switches operate at 50 percent duty cycle but the phase angle between the two switch legs is varied to control power flow. This technique enables zero-voltage switching (ZVS) naturally because the energy stored in leakage inductance is used to charge and discharge switch capacitances before the device turns on. The result is dramatically reduced switching losses at high power levels.

Real-world full-bridge designs for server power supplies, welding machines, and EV chargers consistently use phase-shift full-bridge topology with synchronous rectification on the secondary for efficiency above 95 percent.

Example
Given:
Full-bridge SMPS, Vin = 400 V, Turns ratio Ns/Np = 1/4, D = 0.45

Why this formula applies:
Full-bridge applies full Vin to primary in each half-cycle, so Vout = (Ns/Np) x Vin x 2D

Formula:
Vout = (Ns / Np) x Vin x 2D

Substitution:
Vout = (1/4) x 400 x 2 x 0.45

Calculation:
Vout = 0.25 x 400 x 0.9 = 0.25 x 360

Final Answer:
Vout = 90 V
Exam Tip: In GATE problems, half-bridge output uses Vout = (Ns/Np) x Vin x D and full-bridge uses Vout = (Ns/Np) x Vin x 2D. The factor of 2 difference is the most common calculation trap. Also remember maximum duty cycle per switch is less than 0.5 in half-bridge, not 1.

Mechanism: How the Bridge Drives the Transformer

Full-Bridge Phase-Shift Switching Waveforms and Power FlowS1,S4S2,S3Vprim+Vin-Vin+Vin-VinVsecDeadtimeS1,S4 ON+Vin to TxS2,S3 ON-Vin to TxLeg A switchesLeg B switchesPhase shift between legs controls power
Figure 2: Full-Bridge Gate Signals and Primary Voltage Waveform
  • In half-bridge, the transformer primary is connected between the midpoint of the two series capacitors (Vin/2) and the midpoint of the two switches. Only Vin/2 appears across the primary each half-cycle.
  • In full-bridge, diagonal switch pairs alternate to push positive then negative Vin across the full primary winding, doubling the volt-second product and enabling higher power transfer.
  • Dead time is mandatory between complementary switch transitions to prevent shoot-through, where both switches in one leg conduct simultaneously and short the DC bus.
  • Phase-shift full-bridge achieves ZVS by exploiting transformer leakage inductance and switch output capacitance to complete resonant transitions during dead time, eliminating turn-on switching losses.
  • Synchronous rectification on the secondary replaces diodes with MOSFETs controlled to conduct when the diode would naturally conduct, reducing conduction losses at high currents.

Quick Revision

  • Half-bridge: 2 switches, capacitor divider, transformer sees Vin/2. Suitable up to 500 W to 1 kW.
  • Full-bridge: 4 switches in H configuration, transformer sees full Vin. Used above 1 kW.
  • Vout formula: Half-bridge Vout = (Ns/Np) x Vin x D. Full-bridge Vout = (Ns/Np) x Vin x 2D.
  • Maximum duty cycle per switch is less than 0.5 due to required dead time in both topologies.
  • Full-bridge switch peak current is half that of half-bridge for the same output power.
  • Phase-shift full-bridge enables ZVS using leakage inductance energy during switch transitions.
  • Exam trap: Confusing the factor of 2 in the full-bridge voltage equation or applying half-bridge formula to full-bridge problem.

Bridge SMPS Topologies

Assess half and full bridge operational limits.

Question 1 of 3

Q1.What is the absolute primary topological advantage of selecting a half-bridge SMPS architecture over a push-pull configuration for high input voltages?