Nodal Analysis

Nodal analysis is one of the most systematic methods for solving electrical circuits by finding unknown node voltages with respect to a reference node. It directly applies Kirchhoff's Current Law (KCL) at each non-reference node and is especially powerful for circuits with many parallel branches. For GATE aspirants, nodal analysis forms the backbone of circuit solving questions involving dependent sources and multi-node networks.

Core Concept of Nodal Analysis

Every circuit has a set of nodes, which are points where two or more elements connect. In nodal analysis, one node is chosen as the reference node (usually ground, denoted 0 V). The voltages at all remaining nodes are measured with respect to this reference. Once node voltages are known, every branch current can be found using Ohm's law.

KCL states that the algebraic sum of currents leaving a node equals zero. For a node with voltage V1 connected to nodes V2 and V3 through resistors R12 and R13 and to a current source Is, the KCL equation takes the form: sum of (outgoing currents through resistors) equals sum of (incoming source currents). This converts the circuit into a set of simultaneous linear equations.

When a voltage source exists between two non-reference nodes, those two nodes together form a supernode. The voltage constraint of the source and a combined KCL equation for the supernode boundary are used together. This situation frequently appears in GATE problems.

Mathematical Expression

For a node k connected to nodes j through conductances Gkj, the general nodal equation is written as:

Gkk multiplied by Vk minus the sum of (Gkj multiplied by Vj) equals Ik, where Gkk is the sum of all conductances connected to node k, and Ik is the net current injected into node k by current sources. In matrix form this is written as [G][V] = [I], where [G] is the conductance matrix, [V] is the node voltage vector, and [I] is the source current vector.

The conductance matrix is symmetric and diagonally dominant for passive networks. The diagonal entry Gkk equals the total conductance at node k. The off-diagonal entry Gkj equals the negative of the conductance directly between nodes k and j. This structure makes the matrix easy to write by inspection.

Practical Understanding

Nodal analysis is preferred when the circuit has more mesh loops than nodes, because fewer equations mean less computation. Circuits driven by current sources are naturally suited for nodal analysis. When voltage sources dominate, mesh analysis may be simpler, but nodal analysis still works by introducing supernode constraints.

In electronics, nodal analysis is used extensively in SPICE-based circuit simulators. The simulator sets up the conductance matrix automatically and solves it numerically. Understanding how this matrix forms helps in debugging simulation setups and interpreting results.

Solved Numerical Example

Consider a two-node circuit where node V1 is connected to ground through a 4 ohm resistor, to node V2 through a 2 ohm resistor, and a 3 A current source injects current into node V1. Node V2 is connected to ground through a 6 ohm resistor. Applying KCL at each node and using conductance values (G = 1/R) allows solving for V1 and V2 simultaneously.

Given:
Current source Is = 3 A injected at node V1
R1 = 4 Ω (V1 to ground), R2 = 2 Ω (V1 to V2), R3 = 6 Ω (V2 to ground)

Why this formula applies:
KCL at each non-reference node sets sum of outgoing currents equal to incoming source currents.
Conductances: G1 = 1/4 = 0.25 S, G2 = 1/2 = 0.5 S, G3 = 1/6 = 0.167 S

Formula:
At V1: (G1 + G2)*V1 - G2*V2 = Is
At V2: -G2*V1 + (G2 + G3)*V2 = 0

Substitution:
At V1: (0.25 + 0.5)*V1 - 0.5*V2 = 3  →  0.75*V1 - 0.5*V2 = 3
At V2: -0.5*V1 + (0.5 + 0.167)*V2 = 0  →  -0.5*V1 + 0.667*V2 = 0

Calculation:
From node V2 equation: V1 = (0.667/0.5)*V2 = 1.333*V2
Substitute into node V1 equation:
0.75*(1.333*V2) - 0.5*V2 = 3
1.0*V2 - 0.5*V2 = 3
0.5*V2 = 3  →  V2 = 6 V
V1 = 1.333 * 6 = 8 V

Final Answer:
V1 = 8 V, V2 = 6 V
Branch current through R2 = (V1 - V2)/R2 = (8-6)/2 = 1 A (flowing from V1 to V2)

Exam Tip: In GATE problems, always identify supernodes first before writing KCL equations. A floating voltage source between two non-reference nodes creates a supernode, and missing this step will give wrong equations. Also, the conductance matrix diagonal entries are always positive, and off-diagonal entries are always negative for passive circuits.

Mechanism: Supernode Technique

• A supernode is formed when a voltage source (independent or dependent) exists between two non-reference nodes.
• Write one voltage constraint equation: Va minus Vb equals Vs (or the expression for a dependent source).
• Write one KCL equation for the combined supernode boundary, treating the voltage source as transparent to current flow.
• These two equations together solve for both unknown node voltages.
• Elements connected between the two supernode terminals (other than the voltage source itself) are included in the boundary KCL.

Quick Revision

• Nodal analysis uses KCL at each non-reference node to write voltage equations.
• Reference node is assigned 0 V. All node voltages are measured with respect to it.
• Matrix form: [G][V] = [I]. Diagonal Gkk = total conductance at node k. Off-diagonal Gkj = negative of conductance between nodes k and j.
• Supernode rule: voltage source between two non-reference nodes creates a supernode. Write voltage constraint plus combined KCL.
• Preferred for circuits with more loops than nodes, or those driven by current sources.
• Common GATE trap: forgetting to include a supernode when a floating voltage source is present, leading to an under-determined system.
• After finding node voltages, all branch currents follow from Ohm's law: I = (Vk - Vj) / R.