SPICE Basics

SPICE (Simulation Program with Integrated Circuit Emphasis) is the industry-standard tool for simulating electronic circuits. Understanding SPICE at a conceptual level, particularly how netlists are structured and what simulation types are available, is important for engineering students who will design, verify, and debug circuits in practical environments. GATE and university exams occasionally test the conceptual understanding of SPICE simulation modes.

What is a SPICE Netlist

A netlist is a text file that completely describes the circuit to be simulated. It lists every component, the nodes it connects to, and its value or model parameters. SPICE reads this file, builds internal mathematical models (primarily systems of differential and algebraic equations), and solves for all node voltages and branch currents as required by the analysis type requested.

The first line of any SPICE netlist is always a title or comment line beginning with an asterisk (*). The last line must be .end. Every line in between either defines a circuit element or specifies an analysis or model. SPICE is not case-sensitive.

Netlist Element Syntax

Every element line follows a standard format: the element name starts with a letter that identifies its type, followed by node connections and the value. For example, R for resistors, C for capacitors, L for inductors, V for voltage sources, I for current sources, and M for MOSFETs. A resistor line such as R1 1 2 1k means: resistor named R1 connected between nodes 1 and 2 with a value of 1 kilohm. Node 0 is always the ground reference node.

Active device models such as MOSFETs and BJTs require a .model statement that defines the device parameters (threshold voltage, mobility, channel length, etc.). The element line references the model name. More complex devices use subcircuit definitions with .subckt and .ends to encapsulate a block of elements representing one device or module.

Simulation Types

SPICE supports several distinct simulation types, each activated by a dot-command in the netlist. The .OP (operating point) analysis finds the DC steady-state node voltages and branch currents with all capacitors open and all inductors shorted. This is always run first internally by SPICE to find the bias point before any other analysis.

The .DC sweep analysis varies one or more DC source values over a specified range and records the circuit response at each step. This is used to plot I-V characteristics of diodes and transistors. The .TRAN (transient) analysis solves the time-domain response of the circuit from t = 0 to a specified stop time, using a specified time step. It is used to observe waveforms, settling times, oscillation, and pulse response.

The .AC analysis performs small-signal frequency-domain analysis. SPICE linearises the circuit around the DC operating point and sweeps the frequency from a start to stop value. The output is the magnitude and phase of node voltages as a function of frequency, making it ideal for filter analysis and Bode plots.

Mathematical Basis of SPICE

SPICE internally formulates the circuit equations using the Modified Nodal Analysis (MNA) method. For a circuit with n nodes and b branches, MNA assembles a system of equations of the form G*x = b, where G is the conductance matrix (modified to include voltage sources), x is the vector of unknown node voltages and source currents, and b is the excitation vector. For transient analysis, capacitors and inductors introduce derivative terms, leading to a system of differential algebraic equations solved by numerical integration (typically backward Euler or trapezoidal rule).

Solved Example

Given:
Simple RC low-pass filter: R = 1 kohm, C = 1 nF, input = 1 V AC
Find the -3dB cutoff frequency and write the .AC command to verify it.

Why this formula applies:
For a series RC filter, the -3dB frequency is when the capacitive reactance equals the resistance.

Formula:
f_c = 1 / (2 * pi * R * C)

Substitution:
f_c = 1 / (2 * 3.14159 * 1000 * 1e-9)

Calculation:
f_c = 1 / (6.2832e-6)
f_c = 159,155 Hz ≈ 159 kHz

SPICE netlist to verify:
* RC Low Pass Filter
Vin  1  0  AC  1
R1   1  2  1k
C1   2  0  1n
.AC  DEC  100  1k  10MEG
.PROBE V(2)
.END

Final Answer:
Cutoff frequency f_c ≈ 159 kHz.
At f_c, V(2) magnitude = 1/sqrt(2) ≈ 0.707 V (i.e., -3 dB).
The .AC DEC 100 1k 10MEG command sweeps from 1 kHz to 10 MHz with 100 points per decade.

Exam Tip: In GATE, SPICE conceptual questions often ask what .OP analysis assumes (capacitors open, inductors short). Also note that .AC is a small-signal analysis linearised around the DC bias point, not a large-signal time-domain simulation.

• .OP assumes capacitors are open circuits and inductors are short circuits. It computes only the DC bias voltages and currents.
• .DC sweeps a source from start to stop and plots circuit response. Used for I-V and transfer characteristics.
• .TRAN solves the time-domain circuit equations from t=0 to a stop time using numerical integration. Waveforms are the output.
• .AC linearises the circuit at the .OP bias point and performs frequency sweep. Output is magnitude and phase (Bode plot).
• Modified Nodal Analysis (MNA) is the internal formulation SPICE uses to set up the equation system for all analysis types.

Quick Revision

• Netlist format: element name (type letter), node1, node2, value. Node 0 is always ground.
• .OP: DC bias, C=open, L=short. .DC: sweep source, plot I-V. .TRAN: time waveforms. .AC: frequency Bode plot.
• SPICE internally uses Modified Nodal Analysis (MNA) to build the equation system.
• .AC is small-signal only. It is not valid for large-signal or nonlinear frequency analysis.
• Trap: .OP is not the same as .DC. .OP gives only one operating point; .DC sweeps a range.
• f_c = 1 / (2*pi*RC) for RC filter; this is the -3dB frequency verifiable via .AC simulation.
• Trap: SPICE does not validate physical realisability. A netlist with errors will give incorrect results without warning if nodes are floating.