Forward and Reverse Bias

When an external voltage is applied to a PN junction, it disturbs the equilibrium established by the built-in potential and fundamentally changes the current-carrying behavior of the device. Understanding forward bias and reverse bias conditions through energy band diagrams is the key to understanding rectification, switching, and all junction-based devices.

Forward Bias: Reducing the Barrier

In forward bias, the positive terminal of the external battery is connected to the p-side and the negative terminal to the n-side. This external voltage opposes the built-in potential, reducing the net potential barrier across the junction. With a reduced barrier, majority carriers (holes from p-side, electrons from n-side) have enough thermal energy to diffuse across the junction. This large majority carrier diffusion current is the dominant forward current.

As forward bias increases, the depletion width W shrinks because the external field partially compensates the built-in field. The effective barrier becomes V0 - VF. When VF approaches V0 (approximately 0.6 to 0.7 V for silicon), the barrier nearly disappears and current rises exponentially. This exponential relationship between current and applied voltage is described by the Shockley diode equation.

Reverse Bias: Widening the Barrier

In reverse bias, the polarity is reversed: the negative terminal connects to the p-side and the positive terminal to the n-side. This external voltage adds to the built-in potential, raising the total barrier height to V0 + VR. Majority carriers are pushed further away from the junction, widening the depletion region and making the barrier even more formidable.

Minority carriers (electrons on the p-side, holes on the n-side), however, experience a favorable field and drift across the junction. This constitutes the reverse saturation current Is, which is very small (in the nA to pA range for silicon at room temperature) and nearly independent of the applied reverse voltage. It depends strongly on temperature because minority carrier concentration is governed by ni^2.

Energy Band Diagrams

The energy band diagram provides the most powerful visualization of junction behavior. At equilibrium, the Fermi level EF is flat (constant) across the junction, and the conduction band EC and valence band EV tilt across the depletion region to accommodate the built-in potential. The tilt represents the built-in electric field; electrons roll downhill (toward lower EC) and holes roll uphill (toward higher EV) along this tilt.

Under forward bias, the Fermi level on the n-side is raised by qVF relative to the p-side (or equivalently, the p-side Fermi level is lowered). This reduces the band bending. The reduced tilt means a lower barrier for majority carriers. Under reverse bias, the n-side Fermi level is lowered by qVR, increasing band bending and raising the barrier further. The two quasi-Fermi levels separate by the applied voltage.

Mathematical Expression

The depletion width under an applied bias V (positive for forward, negative for reverse) is: W(V) = sqrt(2 x epsilon_s x (V0 - V) / q x (1/NA + 1/ND)). For reverse bias, V is negative so (V0 - V) increases, making W larger. For forward bias, V is positive and W decreases. The junction capacitance, also called depletion capacitance or transition capacitance, is: Cj = epsilon_s x A / W = A x sqrt(q x epsilon_s / (2 x (V0 - V)) x (NA x ND / (NA + ND))), where A is the junction area.

Given:
Silicon PN junction at T = 300 K
NA = 10^17 cm^-3, ND = 10^15 cm^-3
epsilon_s = 11.7 x 8.85 x 10^-14 F/cm = 1.035 x 10^-12 F/cm
q = 1.6 x 10^-19 C
V0 = 0.70 V (from previous calculation)
Applied reverse bias VR = 5 V, so V = -5 V

Why this formula applies:
Reverse bias increases effective barrier to (V0 + VR), widening depletion region.

Formula:
W = sqrt(2 x epsilon_s x (V0 + VR) / q x (1/NA + 1/ND))

Substitution:
(V0 + VR) = 0.70 + 5 = 5.70 V
(1/NA + 1/ND) = (1/10^17 + 1/10^15) = 1.01 x 10^-15 cm^3
W = sqrt(2 x 1.035 x 10^-12 x 5.70 / (1.6 x 10^-19) x 1.01 x 10^-15)

Calculation:
Numerator: 2 x 1.035e-12 x 5.70 = 1.18 x 10^-11
Denominator: 1.6e-19 / 1.01e-15 = 1.585 x 10^-4
W^2 = 1.18 x 10^-11 / 1.585 x 10^-4 = 7.44 x 10^-8 cm^2
W = 2.73 x 10^-4 cm = 2.73 micrometers

Final Answer: Depletion width under 5 V reverse bias is approximately 2.73 micrometers, much wider than the ~0.3 micrometer zero-bias width.

Exam Tip: For GATE, remember that under reverse bias the depletion width increases as sqrt(V0 + VR) and the junction capacitance decreases as 1/sqrt(V0 + VR). Varactor diodes exploit this voltage-variable capacitance. Also, the reverse saturation current Is doubles approximately every 10 degrees Celsius increase in temperature for germanium, and approximately every 6 to 7 degrees Celsius for silicon.

• Forward bias reduces the potential barrier from V0 to (V0 - VF), shrinks depletion width, and allows large majority carrier diffusion current.
• Reverse bias increases the barrier to (V0 + VR), widens the depletion region, and only a small minority carrier drift current (Is) flows.
• In the energy band diagram, forward bias reduces band bending and separates quasi-Fermi levels by qVF; reverse bias increases bending and separates them by qVR.
• Depletion width W is proportional to sqrt(V0 - V); junction capacitance Cj is proportional to 1/sqrt(V0 - V).
• Reverse saturation current Is is sensitive to temperature because it depends on ni^2, which increases rapidly with T.

Quick Revision

• Forward bias: p connected to +, n to -; reduces barrier, large current flows exponentially.
• Reverse bias: p connected to -, n to +; increases barrier, only tiny Is flows.
• Depletion width W = sqrt(2 x epsilon_s x (V0 - V) / q x (1/NA + 1/ND)); increases under reverse bias.
• Junction (depletion) capacitance Cj decreases under reverse bias as 1/sqrt(V0 + VR) — exploited in varactor diodes.
• Energy band: flat EF at equilibrium; quasi-Fermi levels split under bias by the applied voltage.
• Is approximately doubles every 10 C for Ge and every 6 to 7 C for Si.
• Trap: The built-in potential V0 is not reduced to zero by forward bias until VF = V0; the knee of the I-V curve appears at VF ~ 0.6 to 0.7 V for Si, not at 0 V.