PN Junction Basics

The PN junction is the fundamental building block of almost every semiconductor device, from simple rectifier diodes to complex integrated circuits. Understanding how charge carriers redistribute when a p-type and n-type semiconductor are brought into contact, and how this creates a built-in electric field, is the starting point for all of electronic devices theory.

Formation of the PN Junction

When a p-type semiconductor (doped with acceptor atoms, majority carriers are holes) is placed in direct contact with an n-type semiconductor (doped with donor atoms, majority carriers are electrons), a concentration gradient exists at the interface. Electrons from the n-side diffuse toward the p-side, and holes from the p-side diffuse toward the n-side. This diffusion is driven purely by the concentration difference, exactly as a drop of ink spreads in water.

As electrons leave the n-side near the junction, they expose positively charged donor ions (fixed, immobile). As holes leave the p-side, they expose negatively charged acceptor ions. This region near the junction, stripped of mobile carriers, is called the depletion region or space-charge region. The exposed fixed charges create an electric field directed from the n-side (positive) to the p-side (negative).

Built-In Potential

The electric field created by the ionized dopants opposes further diffusion of majority carriers. As diffusion continues, the electric field grows until the drift current (due to the field) exactly balances the diffusion current. At this equilibrium point, the net current across the junction is zero. The potential difference corresponding to this equilibrium electric field is called the built-in potential or contact potential, denoted V0 or Vbi.

The built-in potential can be derived using the condition that the Fermi level must be constant across the junction at thermal equilibrium. The resulting expression is: V0 = (kT/q) x ln(NA x ND / ni^2), where NA is the acceptor concentration, ND is the donor concentration, ni is the intrinsic carrier concentration, k is Boltzmann's constant, T is absolute temperature, and q is the electron charge.

Mathematical Expression

The thermal voltage VT = kT/q appears frequently in semiconductor equations. At room temperature (300 K), VT = 26 mV. The built-in potential formula shows that V0 increases with higher doping on either side and decreases with increasing temperature (because ni increases rapidly with T). For silicon at 300 K, typical V0 values are in the range 0.6 to 0.8 V.

Depletion Width

The total depletion width W extends partly into the p-side (xp) and partly into the n-side (xn). By charge neutrality, the total charge on each side must be equal: q x NA x xp = q x ND x xn. This means the depletion region extends farther into the more lightly doped side. The full depletion width is: W = sqrt(2 x epsilon_s x V0 / q x (1/NA + 1/ND)), where epsilon_s is the semiconductor permittivity.

Given:
Silicon PN junction at T = 300 K
NA = 10^17 cm^-3 (p-side)
ND = 10^15 cm^-3 (n-side)
ni = 1.5 x 10^10 cm^-3
kT/q = 0.026 V

Why this formula applies:
At equilibrium, Fermi level is flat. Built-in potential equals the difference in electrostatic potential needed to align Fermi levels.

Formula:
V0 = (kT/q) x ln(NA x ND / ni^2)

Substitution:
V0 = 0.026 x ln(10^17 x 10^15 / (1.5 x 10^10)^2)
   = 0.026 x ln(10^32 / 2.25 x 10^20)
   = 0.026 x ln(4.44 x 10^11)

Calculation:
ln(4.44 x 10^11) = ln(4.44) + 11 x ln(10) = 1.49 + 25.33 = 26.82
V0 = 0.026 x 26.82 = 0.697 V

Final Answer: Built-in potential V0 = 0.697 V (~0.7 V for silicon), consistent with typical values for asymmetric silicon junctions.

Exam Tip: In GATE problems, the depletion region extends more into the lightly doped side. If ND is much smaller than NA, most of the depletion width is on the n-side. Also, V0 depends on the product NA x ND logarithmically, so doubling the doping does not double V0.

• Electrons diffuse from n to p, holes diffuse from p to n, uncovering fixed ionized donors and acceptors to form the depletion region.
• The built-in electric field points from n to p (from positive donor ions to negative acceptor ions) and opposes further diffusion.
• At equilibrium, drift current and diffusion current balance exactly; net current is zero and the Fermi level is flat.
• Charge neutrality requires NA x xp = ND x xn, so the depletion region is wider on the lightly doped side.
• The built-in potential V0 depends logarithmically on the product of doping concentrations and on temperature through ni.

Quick Revision

• Depletion region: region near junction stripped of mobile carriers; contains fixed ionized dopant atoms.
• Built-in potential: V0 = (kT/q) x ln(NA x ND / ni^2); for Si at 300 K, typically 0.6 to 0.8 V.
• Thermal voltage VT = kT/q = 26 mV at 300 K.
• Depletion extends more into lightly doped side; NA x xp = ND x xn always holds.
• At equilibrium: net current = 0, Fermi level is constant throughout the junction.
• Increasing temperature increases ni, which decreases V0.
• Trap: V0 is a property of the unbiased junction; it cannot be measured directly with a voltmeter because contact potentials cancel it out at the probes.