Voltage Divider Bias

Voltage divider bias is the most widely used biasing scheme in practical BJT amplifier design. It stabilizes the Q-point so well that it becomes almost independent of β, making it suitable for mass production.

Core Concept

In voltage divider bias (also called potential divider bias), two resistors R1 and R2 form a voltage divider from VCC to ground. This sets a fixed base voltage VB. An emitter resistor RE then determines the emitter current IE and, since IE ≈ IC, it sets the collector current.

The stability mechanism comes from RE. If IC tries to increase (due to temperature or β variation), IE increases. This increases the voltage drop across RE (VE = IE × RE). VB is held nearly fixed by the voltage divider. So VBE = VB - VE decreases. A lower VBE means lower IB, which reduces IC. This is a strong DC negative feedback loop, and it makes the Q-point very stable.

The analysis uses two methods. The exact method uses the Thevenin equivalent of the R1-R2 divider. The approximate method assumes the divider current is much larger than IB (at least 10 times), so IB loading is ignored. The approximate method is acceptable when β × RE is much greater than R1 || R2.

Key Equations

Approximate method (valid when β×RE >> R1||R2): VB = VCC × R2 / (R1 + R2). Then VE = VB - VBE = VB - 0.7. Emitter current: IE = VE / RE. Collector current: IC ≈ IE (since α ≈ 1).

Collector-emitter voltage: VCE = VCC - IC × RC - IE × RE ≈ VCC - IC × (RC + RE). Thevenin equivalent values: VTH = VCC × R2/(R1+R2) and RTH = R1 || R2 = R1×R2/(R1+R2).

Stability factor: S = (β+1)(RTH + RE) / (RTH + RE + β×RE). For β × RE >> RTH, S approaches 1, which is ideal stability. Compare this to S = β+1 for fixed bias.

Given:
  VCC = 12V
  R1 = 33 kΩ
  R2 = 10 kΩ
  RC = 2.2 kΩ
  RE = 1 kΩ
  VBE = 0.7V
  β = 100 (BC547)

Why this formula:
  Approximate method: divider sets VB.
  β × RE = 100 × 1000 = 100 kΩ >> R1||R2 = 7.67 kΩ. Approximate OK.

Formula:
  VB = VCC × R2 / (R1 + R2)
  VE = VB - VBE
  IE = VE / RE
  IC ≈ IE
  VCE = VCC - IC×(RC + RE)

Substitution:
  VB = 12 × 10000 / (33000 + 10000)
  VE = VB - 0.7
  IE = VE / 1000
  VCE = 12 - IC × (2200 + 1000)

Calculation:
  VB = 12 × 10000 / 43000 = 120000 / 43000 = 2.79V
  VE = 2.79 - 0.7 = 2.09V
  IE = 2.09 / 1000 = 2.09 mA
  IC ≈ IE = 2.09 mA
  VCE = 12 - 2.09 × 10^-3 × 3200
      = 12 - 6.69
      = 5.31V

  IB = IC / β = 2.09 mA / 100 = 20.9 µA
  Verify: I_divider = VCC/(R1+R2) = 12/43000 = 279 µA >> IB. Approx valid.

Final Answer:
  VB = 2.79V, VE = 2.09V
  IC ≈ IE = 2.09 mA
  VCE = 5.31V
  Q-point: (5.31V, 2.09 mA) — well centered in active region

Exam Tip: GATE uses both exact and approximate methods. To decide which method to use, check if β × RE >> R1 || R2. If this condition holds (a ratio of at least 10:1), use the approximate method. If not, use Thevenin's theorem to get VTH and RTH, then write KVL: VTH = IB × RTH + VBE + IE × RE, where IE = (β+1) × IB. Solve for IB exactly.

Key Properties

• Most stable biasing scheme. The Q-point is nearly independent of β when β × RE >> R1 || R2.
• VB is set by R1 and R2 voltage divider. It is fixed regardless of IC (in the approximate analysis).
• RE provides DC feedback: if IC rises, VE rises, VBE falls, IB falls, IC is reduced back toward the Q-point.
• For AC analysis, RE is usually bypassed with a capacitor CE (typically 100 µF) to prevent gain loss. Without CE, voltage gain is reduced by the factor (1 + gm×RE).
• Thevenin resistance RTH = R1 || R2. For the example circuit, RTH = 33k || 10k = 7.67 kΩ.
• The stability factor S approaches 1 for very large β × RE / RTH. This means the Q-point is nearly perfectly stable.
• Input resistance of the stage is RTH in parallel with β × (re + RE), where re = 26 mV / IC.

Quick Revision

• R1 and R2 form voltage divider. RE provides emitter feedback. Both together stabilize Q-point.
• Approximate method: VB = VCC × R2/(R1+R2). Valid when β×RE >> R1||R2.
• VE = VB - 0.7V. IE = VE / RE. IC ≈ IE.
• VCE = VCC - IC×RC - IE×RE ≈ VCC - IC×(RC + RE).
• Stability factor S approaches 1. Best stability of all biasing schemes.
• CE bypass capacitor across RE restores AC gain without affecting DC Q-point.
• Thevenin: VTH = VCC × R2/(R1+R2), RTH = R1 || R2. Use for exact analysis.
• Exam trap: Computing VCE = VCC - IC × RC and forgetting the - IE × RE term. When RE is present, VCE = VCC - IC×RC - IE×RE. Missing RE gives a VCE that is too high by IE×RE volts.