Phase Locked Loop

A Phase Locked Loop (PLL) is a closed loop feedback system that synchronizes an output oscillator to an input reference signal in both frequency and phase. PLLs are used in FM demodulation, clock recovery, frequency synthesis, and carrier synchronization. For GATE aspirants, PLL analysis using loop gain and transfer functions is a high value topic.

Core Concept Explanation

A PLL consists of three main blocks: a Phase Detector (PD), a Low Pass Filter (LPF), and a Voltage Controlled Oscillator (VCO). The phase detector compares the phase of the input reference signal with the phase of the VCO output and generates an error signal proportional to the phase difference. This error signal is filtered by the LPF and applied as the control voltage to the VCO, nudging its frequency toward the reference.

When the loop is locked, the VCO output frequency exactly equals the input reference frequency, and the phase error settles to a constant value (ideally zero for a type 2 PLL or a small finite value for a type 1 PLL). The loop continuously corrects any drift, maintaining synchronization. Before lock is achieved, the loop undergoes a transient acquisition process.

The lock range (also called hold range) is the range of input frequencies over which the PLL can maintain lock once it is already locked. The capture range (pull-in range) is the narrower range of frequencies from which the PLL can acquire lock starting from an unlocked state. Capture range is always less than or equal to lock range.

The phase detector can be implemented as a simple analog multiplier (XOR gate or Gilbert cell), or as a digital phase frequency detector (PFD). The choice affects the linearity of the phase error characteristic and the frequency range over which the PD works correctly.

Mathematical Expression

In the Laplace domain, the open loop gain of a PLL is:

G(s) = Kd × F(s) × Ko / s

where Kd is the phase detector gain in V/rad, F(s) is the loop filter transfer function, Ko is the VCO gain in rad/s/V, and the 1/s term comes from the VCO acting as an integrator. For a simple first order PLL with no loop filter (F(s) = 1), the closed loop transfer function is:

H(s) = Ko × Kd / (s + Ko × Kd)

The product Ko × Kd is the loop gain K, with units of rad/s. The loop bandwidth and the lock range are directly determined by K. A higher K gives a faster response but may cause stability issues for higher order PLLs.

Practical Understanding

In FM demodulation using a PLL, the VCO tracks the instantaneous frequency of the FM signal. The control voltage applied to the VCO is a replica of the original modulating signal. This is how the PLL extracts the audio from an FM broadcast. This is one of the most important practical applications tested in GATE.

In frequency synthesizers, a divide by N counter is inserted in the feedback path of the PLL. When locked, fo/N = fi, so fo = N × fi. By changing N, the output frequency can be set to any integer multiple of the reference. This is how modern RF transceivers generate multiple channel frequencies from a single crystal reference.

The loop filter is critical in determining the PLL order and type. A passive RC filter makes the PLL second order type 1. An active integrating filter (using an op amp) makes it second order type 2, which gives zero steady state phase error for step frequency inputs. The damping factor and natural frequency of the second order PLL are key parameters for transient analysis.

Given:
Kd = 0.5 V/rad (phase detector gain)
Ko = 2π × 50 × 10^3 rad/s/V (VCO gain, for 50 kHz/V)
F(s) = 1 (first order PLL, no filter)

Why this formula applies:
For first order PLL, loop gain K determines lock range and bandwidth.

Formula:
K = Kd × Ko

Substitution:
K = 0.5 × (2π × 50000)

Calculation:
K = 0.5 × 314159 = 157080 rad/s

Final Answer:
K ≈ 157 krad/s
Loop bandwidth (3dB) ≈ K/(2π) ≈ 25 kHz
Lock range ≈ ±K/2π ≈ ±25 kHz around center frequency

Exam Tip: GATE frequently asks: capture range is always less than or equal to lock range. For a first order PLL, lock range equals ±K/2π where K = Kd × Ko. The VCO transfer function in the Laplace domain is Ko/s, not just Ko. Forgetting the integrator s in the denominator is the most common mistake.

Quick Revision

• PLL blocks: Phase Detector → Low Pass Filter → VCO → feedback to PD.
• Open loop gain: G(s) = Kd × F(s) × Ko / s.
• Loop gain K = Kd × Ko (for F(s) = 1). Units: rad/s.
• Lock range (hold range) is always greater than or equal to capture range.
• VCO modeled as Ko/s in Laplace domain (integrator behavior).
• FM demodulation: VCO control voltage directly tracks the modulating signal.
• Divide by N in feedback gives frequency multiplication: fo = N × fi.