Phase Locked Loop
PLL block diagram, lock range, capture range, applications.
Phase Locked Loop Quiz
Test your knowledge of PLL block diagrams, lock range, capture range, and standard PLL applications.
Question 1 of 3
Q1.In a first-order PLL, the open-loop DC gain is K = Kd * Kv, where Kd is the phase detector gain (V/rad) and Kv is the VCO gain (rad/s/V). The lock range (hold-in range) of the PLL is:
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