Enhancement MOSFET

An enhancement MOSFET is off with zero gate voltage and turns on only when gate voltage exceeds a threshold, making it the natural choice for digital logic and power switching. The IRF540N used in motor driver boards and the 2N7000 in microcontroller I/O circuits are both N-channel enhancement MOSFETs.

Core Concept

An enhancement MOSFET has no physical channel between source and drain when V_GS = 0. The device is normally off. When a positive voltage is applied to the gate of an N-channel device, the electric field across the thin gate oxide (silicon dioxide, 5 nm to 20 nm thick) attracts electrons from the P-type substrate to the surface. Above a critical voltage called the threshold voltage V_th, enough electrons accumulate to form a continuous N-type inversion layer connecting source to drain.

This inversion layer is the channel. Increasing V_GS above V_th increases the channel charge density, reducing channel resistance and increasing drain current. The channel is controlled entirely by the insulating gate oxide, so gate current is essentially zero (below 1 pA). This gives the MOSFET an input impedance above 10^12 Ω, even higher than a JFET.

The IRF540N has V_th = 2V to 4V and R_DS(on) = 44 mΩ at V_GS = 10V. The 2N7000 logic-level device has V_th = 0.8V to 2.4V and is driven directly from 3.3V microcontroller pins. Power MOSFETs use a vertical structure (VDMOS) to carry tens of amperes, while signal MOSFETs like the BS170 handle only 500 mA.

Key Equations

Drain current in saturation: I_D = (µ_n × C_ox × W) / (2L) × (V_GS - V_th)^2 where µ_n is electron mobility (450 cm^2/V·s for silicon), C_ox is gate oxide capacitance per unit area (F/cm^2), W is channel width, L is channel length. The term (µ_n C_ox W)/(2L) is often written as K_n (process transconductance parameter).

Simplified: I_D = K_n × (V_GS - V_th)^2 valid for V_DS ≥ V_GS - V_th (saturation). In the ohmic region (V_DS < V_GS - V_th): I_D = K_n × [2(V_GS - V_th)V_DS - V_DS^2]

Transconductance: g_m = 2 × K_n × (V_GS - V_th) or equivalently g_m = 2 × √(K_n × I_D) both forms are used in GATE problems.

Given:
  N-channel enhancement MOSFET
  K_n = 0.5 mA/V^2 = 0.5×10^-3 A/V^2
  V_th = 2 V
  V_GS = 5 V
  V_DD = 12 V
  R_D = 3 kΩ

Step 1: Assume saturation. Find I_D.
Formula:
  I_D = K_n × (V_GS - V_th)^2

Substitution:
  I_D = 0.5×10^-3 × (5 - 2)^2
      = 0.5×10^-3 × 9

Calculation:
  I_D = 4.5 mA

Step 2: Find V_DS.
  V_DS = V_DD - I_D × R_D
       = 12 - 4.5×10^-3 × 3000
       = 12 - 13.5 = -1.5 V

Step 3: Check saturation condition.
  V_DS(sat) = V_GS - V_th = 5 - 2 = 3 V
  V_DS = -1.5 V < 3 V
  Device is NOT in saturation. It is in the ohmic region.

Step 4: Use ohmic equation.
  I_D = K_n × [2(V_GS - V_th)V_DS - V_DS^2]
  Also: V_DS = 12 - I_D × 3000
  Let V_DS = v.
  I_D = (12 - v) / 3000
  (12-v)/3000 = 0.5×10^-3 × [2(3)v - v^2]
  (12-v)/3000 = 10^-3 × [6v - v^2]
  (12-v) = 3 × [6v - v^2]
  12 - v = 18v - 3v^2
  3v^2 - 19v + 12 = 0
  v = (19 ± √(361 - 144)) / 6 = (19 ± √217) / 6
  v = (19 ± 14.73) / 6
  v1 = 5.62 V, v2 = 0.71 V
  v1 = 5.62 V fails check (V_DS > V_DS(sat) = 3V means saturation, contradiction)
  v2 = 0.71 V satisfies ohmic condition (0.71 < 3V)

Final Answer:
  V_DS = 0.71 V, I_D = (12 - 0.71)/3000 = 3.76 mA
  Device operates in ohmic (triode) region.

Exam Tip: Enhancement MOSFET problems in GATE almost always require you to first assume saturation, calculate V_DS, then check if V_DS ≥ V_GS - V_th. If the check fails, the device is in ohmic and you must solve the more complex equation. Skipping this verification step and blindly using the saturation formula gives a wrong answer for many circuit configurations. Also remember: for enhancement MOSFET, V_th is positive for N-channel and negative for P-channel.

Key Properties

• Normally-off device. No channel exists at V_GS = 0. Turns on only when V_GS > V_th.
• Gate is insulated by SiO₂ (5 nm to 20 nm). Gate current < 1 pA. Input impedance > 10^12 Ω.
• IRF540N: V_th = 2V to 4V, I_D(max) = 33A, R_DS(on) = 44 mΩ at V_GS = 10V.
• 2N7000: V_th = 0.8V to 2.4V, I_D(max) = 200 mA. Can be driven by 3.3V logic directly.
• Saturation condition: V_DS ≥ V_GS - V_th. In saturation, I_D = K_n(V_GS - V_th)^2.
• Transconductance g_m = 2K_n(V_GS - V_th) = 2√(K_n I_D). Increases with drain current.
• Gate oxide can be destroyed by static electricity above 20V to 40V. ESD protection is mandatory in handling and circuit design.

Quick Revision

• Enhancement MOSFET: normally OFF, needs V_GS > V_th to conduct.
• N-channel: V_th positive (2V to 4V typical). P-channel: V_th negative.
• I_D = K_n(V_GS - V_th)^2 in saturation (V_DS ≥ V_GS - V_th).
• I_D = K_n[2(V_GS - V_th)V_DS - V_DS^2] in ohmic (V_DS < V_GS - V_th).
• g_m = 2K_n(V_GS - V_th) = 2√(K_n I_D).
• Gate current is essentially zero. No DC loading on signal source.
• Always verify saturation condition before applying saturation formula.
• Exam trap: Assuming saturation without verification and getting a negative V_DS. This means the device is actually in the ohmic region and you must use the two-term ohmic equation instead.