Multistage Amplifiers

A single transistor stage rarely provides enough gain for a practical system. Multistage amplifiers cascade two or more amplifier stages to achieve higher gain, and they appear in every analog signal chain from microphone preamplifiers to oscilloscope front ends.

Core Concept

Cascading amplifier stages multiplies their voltage gains. If stage 1 has AV1 = -120 and stage 2 has AV2 = -80, the total voltage gain is AV = AV1 * AV2 = 9600. Two CE stages cascade to give a net non-inverting output since each stage shifts phase by 180°. This is called a two-stage CE cascade.

The critical issue in cascading is loading. When stage 2 is connected to stage 1, the input impedance of stage 2 appears in parallel with RC1 of stage 1. This reduces the effective load seen by stage 1 and lowers AV1 below the standalone value. The loaded gain of stage 1 must be calculated using the parallel combination of RC1 and Rin2.

AC coupling with capacitors (10 µF electrolytic) is used between stages to prevent the DC bias of stage 2 from being disturbed by stage 1. At the midband frequencies the capacitors are short circuits. An alternative is direct coupling (DC-coupled), used in differential amplifiers like the LM741 input stage, which extends the response to DC but requires careful bias design.

Key Equations

Overall voltage gain: AV = AV1 * AV2 * ... * AVn. In decibels: AV(dB) = AV1(dB) + AV2(dB) + ....

Loaded gain of stage 1: AV1_loaded = -gm1 * (RC1 || Rin2) where Rin2 = R1_2 || R2_2 || rπ2 is the input impedance of stage 2.

Overall bandwidth shrinks with cascading: fH_total = fH_single * sqrt(2^(1/n) - 1) where n is the number of identical stages.

For n identical stages: BW_n = BW_1 * sqrt(2^(1/n) - 1). For n=2, BW shrinks by factor 0.644. For n=3, by factor 0.510.

Given:
  Two-stage CE amplifier, BC547 in each stage
  VCC = 12V, IC1 = IC2 = 1 mA, beta = 100, VT = 26 mV
  RC1 = RC2 = 4.7 kΩ
  Stage 2 bias: R1 = 47 kΩ, R2 = 10 kΩ

Why this formula:
  Find gm, rπ, then Rin2, then loaded AV1, then AV2, then total.

Step 1 - Small signal params (same for both stages):
  gm = IC/VT = 1 mA / 26 mV = 38.46 mA/V
  rπ = beta/gm = 100/0.03846 = 2600 Ω = 2.6 kΩ

Step 2 - Input impedance of stage 2:
  Rin2 = R1||R2||rπ = 47k||10k||2.6k
  47k||10k = (47*10)/(47+10) k = 470/57 k = 8.246 kΩ
  8.246k||2.6k = (8.246*2.6)/(8.246+2.6) k = 21.44/10.846 = 1.977 kΩ
  Rin2 ≈ 1.98 kΩ

Step 3 - Loaded effective load for stage 1:
  RL1_eff = RC1 || Rin2 = 4700 || 1977
          = (4700*1977)/(4700+1977) = 9291900/6677 = 1391.7 Ω ≈ 1.39 kΩ

Step 4 - AV1 (loaded):
  AV1 = -gm * RL1_eff = -38.46×10⁻³ * 1391.7 = -53.5

Step 5 - AV2 (unloaded, standalone):
  AV2 = -gm * RC2 = -38.46×10⁻³ * 4700 = -180.8

Step 6 - Total gain:
  AV_total = AV1 * AV2 = (-53.5) * (-180.8)

Calculation:
  AV_total = 9672.8 ≈ 9673

Final Answer:
  AV1 (loaded) = -53.5, AV2 = -180.8
  Total voltage gain = +9673 (non-inverting)
  In dB: 20*log10(9673) = 79.7 dB

Exam Tip: GATE often gives a two-stage amplifier and asks for total gain without stating whether loading is included. Always compute Rin of the second stage first, then find the effective RC1 as RC1 || Rin2 for the first stage gain. Using standalone AV1 = gm*RC1 (without loading) will overestimate the total gain significantly. For bandwidth, remember that n identical stages reduce bandwidth by the factor sqrt(2^(1/n) - 1).

Key Properties

• Total voltage gain = product of individual stage gains. In dB, gains add.
• Stage 2 input impedance loads stage 1: effective RC1 = RC1 || Rin2, reducing AV1.
• Two CE stages: 180° + 180° = 360° total phase shift, so overall output is non-inverting.
• Bandwidth decreases with each added stage. Two identical stages give BW = 0.644 * single-stage BW.
• AC coupling between stages allows independent DC biasing of each stage.
• DC coupling (direct coupling) extends response to 0 Hz but requires matched bias design, as used in LM741 input differential pair.
• A Darlington pair is a special two-stage connection (CC + CE or CC + CC) providing current gain of beta^2.

Quick Revision

• AV_total = AV1 * AV2. In dB: add individual gains.
• Always account for loading: RL1_eff = RC1 || Rin2.
• Two CE stages: overall non-inverting (360° phase).
• Bandwidth shrinks: two identical stages give BW_2 = 0.644 * BW_1.
• AC coupling: independent DC bias per stage; blocks DC shifts between stages.
• DC coupling: extends to DC; used in op-amp input stages.
• Darlington pair: effective beta = beta1 * beta2, very high input impedance.
• Exam trap: Students calculate AV1 = -gm*RC1 using the full RC1 value, ignoring that Rin2 is in parallel with RC1. This overestimates total gain by 3-4 times in a typical circuit.