UART

UART (Universal Asynchronous Receiver Transmitter) is one of the oldest and most widely used serial communication protocols in embedded systems. It transmits data bit by bit over a single wire in each direction without requiring a shared clock signal between transmitter and receiver. Instead, both sides agree on a fixed transmission rate called the baud rate, measured in bits per second, which defines the duration of each bit. UART is found in virtually every microcontroller and is used for debug consoles, GPS modules, Bluetooth chips, and PC serial ports.

Core Concept of UART

UART is called asynchronous because it does not use a separate clock line. The transmitter and receiver both independently generate bit timings using their own internal clocks, as long as both are configured to the same baud rate. The receiver samples each incoming bit at the center of its expected duration to reduce the effect of minor timing mismatch. This works reliably as long as the combined clock accuracy of both sides keeps the accumulated timing error within about 3 to 5 percent of a bit period by the end of a frame.

Every UART transmission begins with a start bit, which is always a logic LOW. The idle state of the UART line is HIGH, so a falling edge signals the beginning of a new frame. The receiver detects this falling edge and starts its bit-sampling timer. After the start bit come the data bits (usually 8), transmitted LSB first. After the data bits comes an optional parity bit for error detection, and the frame ends with one or two stop bits, which are always HIGH, restoring the line to idle state.

The configuration is described using a shorthand like 8N1, meaning 8 data bits, No parity, 1 stop bit. Other configurations such as 8E1 (even parity) or 7O1 (7 data bits, odd parity) exist but 8N1 is by far the most common. Parity checking can only detect single-bit errors and cannot correct them, which is why higher-level protocols are used for reliable communication.

Mathematical Expression

The baud rate directly determines the bit duration. If baud rate is 9600 bps, each bit lasts 1/9600 = 104.17 microseconds. For an 8N1 frame, the total frame consists of 1 start bit + 8 data bits + 1 stop bit = 10 bits. Therefore the time to transmit one byte is 10 / baud_rate. The maximum data throughput in bytes per second is: throughput = baud_rate / bits_per_frame. This is why a 9600 baud UART can only transmit 960 bytes per second despite the baud rate sounding like it supports 9600 bytes per second.

Inside a microcontroller, the baud rate register (BRR) is calculated from the peripheral clock. For a simple divider-based UART: BRR = f_PCLK / baud_rate. Many modern implementations allow fractional division to reduce baud rate error when exact division is not possible. The baud rate error in percent is: error = (actual_baud - desired_baud) / desired_baud x 100. UART can tolerate up to about 3.5% total error (combined transmitter and receiver) before framing errors occur.

Practical Understanding

UART requires two wires for full-duplex operation: TX (transmit) from one device connects to RX (receive) of the other, and vice versa. There is no chip-select, no clock, and no shared bus topology. Only two devices can communicate on a direct UART link. If more devices need to share a line, protocols like RS-485 are built on top of UART framing with differential signaling and multi-drop addressing.

Flow control is an important practical concept in UART. When a fast transmitter sends data faster than a slow receiver can process it, buffer overflow causes lost data. Hardware flow control uses two additional signals: RTS (Request to Send) and CTS (Clear to Send). The receiver deasserts CTS when its buffer is full, pausing the transmitter. Software flow control uses special characters XON and XOFF within the data stream instead of extra wires.

Given:
Peripheral clock f_PCLK = 16 MHz
Desired baud rate = 115200 bps
Frame format = 8N1 (10 bits per frame)

Why this formula applies:
Baud rate divider determines how many clock cycles per bit.
Throughput is limited by overhead bits in the frame.

Formula:
BRR = f_PCLK / baud_rate
Bit duration = 1 / baud_rate
Max throughput (bytes/sec) = baud_rate / bits_per_frame
Baud rate error = ((f_PCLK / BRR) - baud_rate) / baud_rate x 100

Substitution:
BRR = 16,000,000 / 115,200 = 138.88
BRR (rounded) = 139
Actual baud = 16,000,000 / 139 = 115,108 bps
Throughput = 115,200 / 10
Error = (115,108 - 115,200) / 115,200 x 100

Calculation:
Bit duration = 1 / 115,200 = 8.68 microseconds
Throughput = 11,520 bytes per second
Error = -92 / 115,200 x 100 = -0.08%

Final Answer:
BRR register value = 139
Bit duration = 8.68 microseconds
Max throughput = 11,520 bytes/second
Baud rate error = 0.08% (well within 3.5% tolerance)

Exam Tip: UART throughput is baud_rate / 10 for 8N1, NOT baud_rate / 8. The start and stop bits add overhead. 9600 baud gives 960 bytes/sec, not 1200. This distinction frequently appears in GATE numerical questions.

• UART is asynchronous: no clock line, both sides must be configured to the same baud rate.
• Frame = start bit (LOW) + data bits (LSB first) + optional parity + stop bit(s) (HIGH).
• 8N1 is the default: 8 data bits, no parity, 1 stop bit — 10 bits total per byte.
• Throughput in bytes/sec = baud_rate / 10 for 8N1, not baud_rate / 8.
• BRR = f_PCLK / baud_rate. Maximum tolerable baud rate error is about 3.5% total.
• Hardware flow control uses RTS/CTS lines to pause transmission when receiver buffer is full.

Quick Revision

• UART: asynchronous, no clock, fixed baud rate on both sides, two wires (TX, RX) for full duplex.
• Bit duration = 1 / baud_rate. Frame overhead: start + stop bits added around data.
• BRR = f_PCLK / baud_rate. Round to nearest integer. Error must be less than 3.5%.
• 8N1 throughput = baud_rate / 10 bytes per second.
• Flow control: RTS/CTS (hardware) or XON/XOFF (software) prevents buffer overflow.
• Exam trap: confusing baud rate with byte throughput. 115200 baud = 11520 bytes/sec for 8N1.
• Parity bit detects single-bit errors only; does not correct errors.