Keyboard Interfacing

In microprocessor-based systems, a keyboard interface is required to accept user input in an organized and efficient manner. Unlike a single switch, a keyboard contains many keys, and connecting each key directly to a processor pin would consume too many I/O lines. Matrix keyboard interfacing solves this problem by arranging keys in a row-column grid and scanning them systematically.

Understanding keyboard interfacing is important for GATE and university exams because it covers fundamental I/O techniques used across all embedded and microprocessor systems. The concept ties together port programming, timing control, and hardware multiplexing in a single practical application.

Core Concept of Matrix Keyboard

A matrix keyboard arranges N keys in an M row by K column grid. This means instead of requiring N individual I/O pins, you only need M + K pins. For a 4x4 keyboard with 16 keys, only 8 I/O lines are needed. This is a direct saving of 8 pins, which is significant in microprocessor systems where I/O ports are limited.

The rows are connected to output pins of a port, and the columns are connected to input pins. When a key is pressed, it creates a physical connection between one specific row line and one specific column line. By controlling which row is active and reading back which column goes low, the processor identifies exactly which key was pressed.

The process of systematically activating each row one at a time and reading all column inputs is called row scanning. The processor drives one row low at a time while keeping the others high, then reads the column port. A low level on any column during that scan indicates a pressed key at the intersection of the active row and that column.

Scanning Algorithm

The scanning algorithm for a 4x4 matrix keyboard works in four steps per full scan cycle. The processor writes 0xFE to the row port, making Row 0 active (low) while Rows 1, 2, 3 remain high. It then reads the column port. If the read value is 0xFF, no key in Row 0 is pressed. If any column bit is 0, the key at that row-column intersection is pressed. This repeats for 0xFD (Row 1), 0xFB (Row 2), and 0xF7 (Row 3).

After identifying a pressed key, a debounce delay of approximately 20 ms is introduced. This eliminates false triggers caused by mechanical bouncing of the key contacts. Without debouncing, a single keypress can register multiple times. In 8085/8086 programs, this delay is implemented using a software delay loop.

Mathematical Expression

For a matrix keyboard with R rows and C columns, the total number of keys is given by the product R x C. The number of I/O lines required is R + C. The saving compared to direct connection is R x C minus (R + C), which equals (R-1)(C-1) - 1 pins saved. For a 4x4 keyboard, this is 16 - 8 = 8 pins saved.

The key code or key number for a key at row r (0-indexed) and column c (0-indexed) is calculated as: Key Number = r x C + c. For a 4x4 matrix, a key at Row 2, Column 3 has key number = 2 x 4 + 3 = 11. This key number is then mapped to an ASCII value or function using a lookup table.

Practical Understanding

In 8085-based systems, Port A of the 8255 PPI is typically configured as output for rows and Port B as input for columns. The 8255 is programmed using the control word to set this direction. The microprocessor writes scan patterns to Port A and reads column data from Port B in a loop.

In modern embedded systems using microcontrollers, the same principle applies but internal pull-up resistors are enabled on column pins. This ensures column lines read high when no key is pressed and go low when a key connects them to the driven-low row line. Pull-up resistors are essential for reliable operation.

Given:
Matrix size = 4 rows x 4 columns
Direct I/O pins needed = 16
Matrix I/O pins needed = 4 + 4 = 8

Why this formula applies:
Each row is driven one at a time; columns are shared inputs across all rows.

Formula:
I/O lines = R + C
Keys identified = R x C
Pin saving = (R x C) - (R + C)

Substitution:
Pin saving = (4 x 4) - (4 + 4)

Calculation:
= 16 - 8
= 8 pins saved

Final Answer: 8 I/O pins saved by using matrix scanning instead of direct key connection.

Exam Tip: In GATE and university exams, if asked for I/O lines for an MxN keyboard, always answer M+N, not M*N. The trap is that MxN is the number of keys, not the number of I/O lines.

• Rows are connected to Port A (output) of 8255; columns to Port B (input).
• Processor drives one row low at a time using scan patterns 0xFE, 0xFD, 0xFB, 0xF7.
• Column port is read after each row activation; a 0 bit indicates a pressed key.
• A 20ms software delay handles mechanical contact bounce (debounce).
• Key number is computed as Row x Columns + Column, then mapped to ASCII via a lookup table.

Quick Revision

• A 4x4 matrix keyboard needs only 8 I/O lines for 16 keys (4 rows + 4 columns).
• Formula: I/O lines = R + C, total keys = R x C, pin saving = RC - (R+C).
• Scanning: one row driven low at a time; column port read to detect keypress.
• Scan patterns for 4 rows: 0xFE, 0xFD, 0xFB, 0xF7.
• 20ms debounce delay is applied after key detection to avoid false triggering.
• Key code = row_number x C + column_number; mapped to ASCII using lookup table.
• Exam trap: I/O lines needed is R+C not R*C which is the total number of keys.