Memory Segmentation

The 8086 microprocessor uses a memory segmentation model to address up to 1 MB of physical memory using only 16-bit registers. This approach divides the entire 1 MB memory space into logical blocks called segments, each addressable through a combination of a segment register and an offset, which together generate a 20-bit physical address.

Core Concept: Why Segmentation Exists in 8086

The 8086 uses 16-bit registers internally. A 16-bit register can address only 2^16 = 65,536 bytes (64 KB). However, the designers needed the processor to address 1 MB of memory (2^20 bytes) to be competitive. Segmentation is the architectural mechanism that achieves this without requiring 20-bit internal registers.

The memory is conceptually divided into segments, which are blocks of memory up to 64 KB in size. Each segment starts at an address that is a multiple of 16 (i.e., the starting address always has 0 as the lowest hex digit). A 16-bit segment register holds the upper 16 bits of this starting address, and a 16-bit offset selects a byte within the segment.

The four dedicated segment registers are CS (Code Segment, used with IP for instruction fetch), DS (Data Segment, used with BX, SI, DI for data access), SS (Stack Segment, used with SP and BP for stack operations), and ES (Extra Segment, used with DI in string operations).

Mathematical Expression: Physical Address Calculation

The physical address is generated by the BIU using the following formula:

Physical Address = Segment Register x 10H + Offset Register. Multiplying by 10H is equivalent to appending a hexadecimal zero to the segment value, or left-shifting by 4 bits. This converts the 16-bit segment value into a 20-bit base address. Adding the 16-bit offset then selects any byte within the 64 KB segment.

The maximum physical address is FFFFFH (1 MB - 1 byte). The minimum is 00000H. Both segment and offset are 16-bit unsigned values, so the theoretical range of physical addresses generated can slightly exceed 1 MB when both are maximum (FFFFH:FFFFH = 10FFEFH), a condition called address wrap-around that was exploited by some early software.

Practical Understanding: Segment Overlap and Relocation

Segments in 8086 can overlap in physical memory. Two different segment:offset combinations can point to the same physical address. For example, if CS = 1000H and IP = 0100H, the physical address is 10100H. Equally, if CS = 1005H and IP = 00B0H, the physical address is also 10100H. This flexibility allowed programmers and operating systems to map the same code or data through different segment:offset pairs.

Segmentation simplifies program relocation, since a program can be moved in memory simply by updating the segment register value without changing any internal offset addresses. This was particularly useful in early DOS multitasking environments where programs were moved around in memory.

Each segment has a maximum size of 64 KB because the offset is 16 bits. If a program requires more than 64 KB for any single segment (code, data, or stack), the programmer must explicitly switch segment register values during execution, which was a known limitation of the 8086 segmented model compared to later flat memory models.

Default Segment Register Pairings

The 8086 BIU automatically selects the appropriate segment register based on the type of memory access. For instruction fetch, CS:IP is always used. For stack push and pop, SS:SP is used. For most data memory accesses using BX, SI, or DI as offset registers, DS is the default segment. For string destination operations using DI, ES is the default segment.

It is possible to override the default segment using a segment override prefix byte placed before the instruction. For example, using CS: prefix before a MOV instruction forces the data access to go through the code segment instead of the data segment. This was commonly used for reading constant data stored in the code segment.

Given:
DS = 4A00H, SI = 02B0H
Find the physical address of the memory operand accessed as DS:SI

Why this formula applies:
Default data access uses DS as segment register with SI as offset in string or indexed operations.

Formula:
Physical Address = DS x 10H + SI

Substitution:
DS x 10H = 4A00H x 10H = 4A000H
SI = 02B0H

Calculation:
PA = 4A000H + 02B0H = 4A2B0H

Final Answer with units:
Physical Address = 4A2B0H (hexadecimal)
In decimal: 4 x 65536 + 10 x 4096 + 2 x 256 + 11 x 16 + 0 = 303,792 decimal.

Exam Tip: Given a physical address and one of the two components (segment or offset), GATE may ask you to find the other. Use PA = Segment x 10H + Offset rearranged as Segment = (PA - Offset) / 10H. Multiple valid segment:offset combinations can map to the same physical address; this is a common conceptual trap.

Segment Register Roles: Summary

• CS (Code Segment): holds the base of the code segment; combined with IP to fetch instructions.
• DS (Data Segment): default segment for data access using BX, SI, DI as offsets.
• SS (Stack Segment): base of the stack; combined with SP for push/pop and with BP for stack frame access.
• ES (Extra Segment): used for string instruction destinations with DI as offset; also available for additional data.
• Segment override prefixes (CS:, DS:, SS:, ES:) allow any segment to be used with any memory access.

Quick Revision

• Physical Address = Segment x 10H + Offset (20-bit result, 1 MB range).
• Four segment registers: CS (code), DS (data), SS (stack), ES (extra); each 16-bit.
• Each segment maximum size = 64 KB (16-bit offset); segments can overlap in physical memory.
• Default pairings: CS:IP (fetch), SS:SP (stack), DS:BX/SI/DI (data), ES:DI (string dest).
• Segment base address is always on a 16-byte boundary (lowest hex digit = 0).
• Segment override prefix can redirect any memory access to a non-default segment.
• Trap: multiple segment:offset pairs can give the same physical address; segment register alone is not the physical address.