Stack Instructions

PUSH, POP, XTHL, SPHL.

Darshan N
Updated: 19 March 2026
9 min read

The stack in the 8085 microprocessor is a special region of RAM that operates on a Last-In-First-Out (LIFO) basis. The Stack Pointer (SP) register always points to the top of the stack. Stack instructions are critical for saving and restoring register values during subroutine calls, for passing data between program sections, and for interrupt handling. PUSH, POP, XTHL, and SPHL are the four primary stack manipulation instructions in the 8085.

8085 Stack Operation: PUSH and POPCPU RegistersBC = 12H 34HDE = 56H 78HHL = 9AH BCHSP = 2100HPSW = A / FlagsStack Memory (RAM)AddressContents20FEH---20FFH12H (B reg)20FEH ← SP after PUSH34H (C reg)20FDHempty20FCHempty← SPPUSH BCSP decrements by 2PUSH rp: SP←SP−1, M[SP]←rH; SP←SP−1, M[SP]←rL (high byte first)POP rp: rL←M[SP], SP←SP+1; rH←M[SP], SP←SP+1 (low byte first)XTHL: swap HL with top-of-stack | SPHL: HL → SPValid pairs for PUSH/POP: BC, DE, HL, PSW (not SP itself)
Figure 1: Stack memory layout showing PUSH operation, SP movement, and byte storage order for 8085

Stack Pointer and Stack Organization

The Stack Pointer (SP) is a 16-bit register in the 8085 that holds the memory address of the current top of the stack. Unlike most data structures, the 8085 stack grows downward in memory. When data is pushed onto the stack, SP is decremented first, and then data is stored at the new SP address. When data is popped, data is read from the current SP address first, and then SP is incremented. This downward growth is a hardware design convention in the 8085 and must be clearly understood for GATE problems involving SP tracking.

The stack must reside in RAM (not ROM) because it is a writable structure. The programmer must initialize SP to a high RAM address before using any stack instructions, typically using LXI SP, address. A common convention is to point SP just above the highest RAM address, for example LXI SP, 2100H if the system has RAM from 2000H to 20FFH.

PUSH Instruction

The PUSH rp instruction saves the contents of a 16-bit register pair onto the stack. The operation consists of two steps: first, SP is decremented by 1 and the high-order byte of the register pair (rH) is stored at M[SP]. Then, SP is decremented again and the low-order byte (rL) is stored at M[SP]. The final SP value points to the low-order byte on the stack.

Valid register pairs for PUSH are BC, DE, HL, and PSW. The PSW pair refers to the Accumulator (A) as the high byte and the Flag register (F) as the low byte. PUSH BC, PUSH DE, PUSH H, PUSH PSW are all valid. Importantly, SP itself cannot be pushed using PUSH; the SP register is not a valid operand for this instruction.

POP Instruction

The POP rp instruction retrieves a 16-bit register pair from the stack. It is the inverse of PUSH. First, the byte at M[SP] is loaded into the low-order register (rL) and SP is incremented. Then, the byte at the new M[SP] is loaded into the high-order register (rH) and SP is incremented again. This restores SP to its value before the corresponding PUSH was executed.

It is critical that every PUSH is matched with a corresponding POP in the same program section. Mismatched PUSH and POP instructions will corrupt SP, causing the CPU to fetch return addresses from wrong memory locations, which is a common source of bugs and a GATE conceptual question.

XTHL Instruction

The XTHL (Exchange Top of Stack with HL) instruction exchanges the contents of the H and L registers with the two bytes at the top of the stack. Specifically, the contents of L are exchanged with M[SP] and the contents of H are exchanged with M[SP+1]. SP is not changed by XTHL. This instruction is useful for accessing and modifying data on the stack while preserving the return address structure. It is a 1-byte instruction requiring 16 T-states.

SPHL Instruction

The SPHL (Set Stack Pointer from HL) instruction copies the 16-bit contents of the HL register pair directly into the Stack Pointer register. After SPHL executes, SP = HL. This is useful when a subroutine needs to dynamically set up a new stack area, or when the stack needs to be repositioned based on a computed address. SPHL is a 1-byte, 6-T-state instruction. It does not affect any flags.

Mathematical Tracking of SP

For a sequence of stack operations, SP can be tracked algebraically. If SP is initialized to address X, then after n PUSH operations, SP = X minus 2n. After m POP operations from that point, SP = X minus 2n plus 2m. If n equals m, SP returns to X. This relationship allows GATE problems to ask for the final value of SP after a given instruction sequence without having a physical machine.

Example
Given:
  Initial SP = 2100H
  Sequence:
    PUSH BC  (BC = 1234H, B=12H, C=34H)
    PUSH DE  (DE = 5678H, D=56H, E=78H)
    POP  HL  (retrieve top of stack into HL)

Why this formula applies:
  PUSH decrements SP by 2 and stores high byte then low byte.
  POP increments SP by 2 and restores pair.

Formula:
  After each PUSH: SP = SP - 2
  After each POP:  SP = SP + 2

Substitution and Calculation:
  Initial SP = 2100H
  After PUSH BC:
    M[20FFH] = 12H (B), M[20FEH] = 34H (C), SP = 20FEH
  After PUSH DE:
    M[20FDH] = 56H (D), M[20FCH] = 78H (E), SP = 20FCH
  After POP HL:
    L ← M[20FCH] = 78H, SP = 20FDH
    H ← M[20FDH] = 56H, SP = 20FEH
    HL = 5678H

Final Answer:
  SP = 20FEH, HL = 5678H (DE's original value was restored into HL)
Exam Tip: In GATE problems tracking SP, remember PUSH always decrements SP by 2 (stores high byte at SP-1, low byte at SP-2, final SP = old SP - 2). POP increments SP by 2. PSW = Accumulator (high) + Flags (low). XTHL does not change SP.
XTHL and SPHL Operation MechanismCPU RegistersH = AAHL = BBHSP = 20FEHOther Registers...Stack (RAM)20FEH → CCH← SP20FFH → DDH2100H → (return addr)XTHLL ↔ M[SP], H ↔ M[SP+1]After XTHL: H=DDH, L=CCHStack top = AAH, BBHSP unchangedSPHL OperationHL = 3000HSPHLSP = 3000HStack pointer repositionedSPHL: SP ← HL | HL unchanged | No flags affected | 1 byte, 6 T-states
Figure 2: XTHL mechanism showing HL-stack exchange and SPHL transferring HL content to Stack Pointer
  • PUSH rp: decrements SP by 2, stores high byte at SP-1 and low byte at SP-2; SP points to low byte after.
  • POP rp: reads low byte from M[SP] into rL, reads high byte from M[SP+1] into rH, increments SP by 2.
  • Valid operands for PUSH/POP: BC, DE, HL, PSW (where PSW = A as high, Flags as low).
  • XTHL swaps H with M[SP+1] and L with M[SP]; SP is not modified.
  • SPHL copies HL into SP directly; useful for dynamic stack repositioning; no flags affected.
  • Stack grows downward: higher initial SP address allows more PUSH operations before stack overflow.

Quick Revision

  • PUSH: SP=SP-1, M[SP]=rH; SP=SP-1, M[SP]=rL. Stack grows downward.
  • POP: rL=M[SP], SP=SP+1; rH=M[SP], SP=SP+1. Stack shrinks upward.
  • PSW in PUSH PSW = Accumulator (A) as high byte, Flag register (F) as low byte.
  • XTHL: exchanges HL with top two bytes of stack; SP unchanged.
  • SPHL: SP ← HL; HL unchanged; no flags affected.
  • After n PUSH and m POP: SP = Initial SP - 2(n-m).
  • Exam trap: SP itself is not a valid operand for PUSH or POP; only BC, DE, HL, PSW are valid.

Stack Instructions Quiz

Test your understanding of PUSH, POP, XTHL, and SPHL stack operations in the 8085.

Question 1 of 3

Q1.Before executing "PUSH B" in 8085, the SP = 2050H. What is the value of SP after the instruction executes?