MOS Capacitances

The switching speed of MOSFET-based circuits is fundamentally limited by the parasitic capacitances associated with the transistor terminals. These capacitances determine how quickly gate voltage can change, which in turn governs the transition frequency, propagation delay, and bandwidth of circuits. Understanding MOS capacitances is essential for both VLSI timing analysis and analog frequency response calculations.

Core Concept: Origin of MOS Capacitances

MOS capacitances arise from two distinct mechanisms: gate oxide capacitance and junction capacitance. The gate-to-channel capacitance is formed by the gate conductor separated from the semiconductor by the thin gate oxide of thickness tox. The oxide capacitance per unit area is Cox = epsilon_ox / tox, where epsilon_ox = 3.45 * 10^-11 F/m. A thinner oxide gives higher Cox, stronger gate control, and faster transistors.

The junction capacitances Csb and Cdb arise from the reverse-biased p-n junctions between the n+ source/drain regions and the p-type bulk. These are voltage-dependent capacitances: they decrease as the reverse bias voltage increases. The body effect and these junction capacitances both depend on the bulk terminal, which is why careful substrate management is important in VLSI layout.

Individual Capacitances

Cgs is the gate-to-source capacitance. In saturation, it includes the overlap capacitance (due to gate overlapping source diffusion) plus approximately (2/3)*W*L*Cox (channel charge distributed mostly toward source). In the linear region, Cgs reduces to about (1/2)*W*L*Cox plus overlap.

Cgd is the gate-to-drain capacitance. In saturation, the channel is pinched off at drain, so Cgd consists mainly of the overlap capacitance only (Cgd_overlap = W*Lov*Cox, where Lov is the overlap length). This is the Miller capacitance in amplifiers, and because it appears between input and output, it is multiplied by (1 + |Av|) at the input due to the Miller effect. This makes Cgd disproportionately important in limiting bandwidth.

Csb and Cdb are the source-body and drain-body junction capacitances respectively. They are given by C = Cj0 / sqrt(1 + VR/phi_0), where VR is the reverse bias voltage and phi_0 is the built-in potential. Cdb is particularly important in digital circuits because the drain swings between 0 and VDD, meaning VR changes with logic state.

Practical Understanding

The unity-gain frequency fT of a MOSFET is the frequency at which the current gain drops to 1. It is given by fT = gm / (2*pi*(Cgs + Cgd)). A higher gm or smaller gate capacitances give a higher fT. Reducing gate length L is the primary technique to increase fT, which is why each technology node shrinks L to improve speed.

In digital gates, the propagation delay is proportional to the total capacitance at the output node, which includes Cdb of the driving transistor and Cgs of the driven transistors. SPICE simulations use the complete capacitance model to accurately predict circuit timing. During design, transistor sizing trades area and power (larger W means larger capacitance) against speed (larger W means larger gm).

Given:
W = 2 um, L = 0.18 um, tox = 4 nm
Lov (overlap) = 0.02 um
epsilon_ox = 3.45e-11 F/m

Why this formula applies:
Computing gate oxide capacitance per unit area and intrinsic Cgs in saturation.

Formula:
Cox = epsilon_ox / tox
Cgs_intrinsic = (2/3) * W * L * Cox
Cgd_overlap = W * Lov * Cox

Substitution:
Cox = 3.45e-11 / 4e-9 = 8.625e-3 F/m^2 = 8.625 fF/um^2

Cgs_intrinsic = (2/3) * 2e-6 * 0.18e-6 * 8.625e-3
= (2/3) * 3.105e-16
= 2.07e-16 F = 0.207 fF

Cgd_overlap = 2e-6 * 0.02e-6 * 8.625e-3
= 3.45e-16 F = 0.345 fF

Final Answer:
Cox = 8.625 fF/um^2
Cgs (saturation) = 0.207 fF + overlap
Cgd (saturation, overlap only) = 0.345 fF

Exam Tip: In saturation, Cgs = (2/3)*W*L*Cox + overlap, while Cgd = overlap only (no channel contribution at drain). In linear region, both Cgs and Cgd = (1/2)*W*L*Cox + overlap. Memorize these approximations for GATE numerical problems.

• Cgs in saturation: (2/3)*W*L*Cox + W*Lov*Cox. This is the dominant input capacitance.
• Cgd in saturation: W*Lov*Cox (overlap only). Acts as Miller capacitance in amplifiers, critically limiting bandwidth.
• Csb and Cdb are reverse-biased junction capacitances. Both are voltage-dependent (nonlinear).
• fT = gm/(2*pi*(Cgs+Cgd)). Reducing L increases fT by reducing gate capacitance.
• Cox = epsilon_ox / tox. Thinner oxide gives higher Cox and better transistor control.

Quick Revision

• Five main capacitances: Cgs, Cgd, Cgb, Csb, Cdb.
• Saturation: Cgs = (2/3)*W*L*Cox + overlap. Cgd = overlap only.
• Linear: Cgs = Cgd = (1/2)*W*L*Cox + overlap.
• fT = gm / (2*pi*(Cgs+Cgd)). Key figure of merit for transistor speed.
• Miller effect multiplies Cgd by (1+|Av|) at amplifier input, drastically reducing bandwidth.
• Trap: In saturation, Cgd is NOT (1/2)*W*L*Cox. Only overlap remains. Forgetting this is a common error.
• Csb and Cdb reduce with higher reverse bias: C = Cj0/sqrt(1+VR/phi0).