NMOS/PMOS I-V

The MOSFET is the fundamental switching and amplification device in VLSI design. Understanding its current-voltage (I-V) characteristics is essential for designing amplifiers, digital logic gates, and analog circuits in CMOS technology. Both NMOS and PMOS devices follow the same physics but with opposite polarities of carrier type, voltage, and current direction.

Core Concept: Three Operating Regions

An NMOS transistor has three distinct operating regions based on the applied terminal voltages. The threshold voltage Vt is the minimum gate-to-source voltage required to form an inversion layer (conducting channel) between source and drain. When VGS is below Vt, the device is in cutoff and ideally no drain current flows.

When VGS exceeds Vt and the drain-to-source voltage VDS is small (VDS less than VGS - Vt), the channel extends from source to drain uniformly. This is the linear (triode) region. The transistor behaves like a voltage-controlled resistor, and drain current increases approximately linearly with VDS.

As VDS increases and reaches VGS - Vt (called VDSsat), the channel pinches off at the drain end. Further increase in VDS does not significantly increase ID. This is the saturation region. The transistor acts as a current source controlled by VGS, which is the regime used in analog amplifiers.

For PMOS, all voltage polarities are reversed. Source is connected to VDD, VGS is negative, VDS is negative, and current flows from source to drain (conventional current direction). The threshold voltage Vtp is negative in magnitude. PMOS and NMOS are complementary, forming the basis of CMOS logic.

Mathematical Expressions

The drain current equations for NMOS in each region are derived from the gradual channel approximation. In the linear region, the current depends on both VGS and VDS, while in saturation it depends only on VGS. The parameter kn (or W/L * un * Cox) captures device geometry and process parameters.

Cutoff region: VGS less than Vt, so ID = 0. Linear region (VGS greater than Vt, 0 less than VDS less than VGS - Vt): ID = kn/2 * [2(VGS - Vt)VDS - VDS^2]. Saturation region (VGS greater than Vt, VDS greater than or equal to VGS - Vt): ID = kn/2 * (VGS - Vt)^2. Here kn = un * Cox * W/L where un is electron mobility, Cox is oxide capacitance per unit area, and W/L is the aspect ratio.

Practical Understanding

The aspect ratio W/L is the primary design handle for a circuit designer. Increasing W/L increases the drive current proportionally, enabling faster switching and higher amplifier transconductance. However, wider transistors also have larger parasitic capacitances, which affects speed.

In digital CMOS, NMOS and PMOS are sized such that both pull-up (PMOS) and pull-down (NMOS) networks have matched drive strengths, typically WPMOS around 2 to 2.5 times WNMOS to compensate for the lower hole mobility. In analog circuits, the transistor is biased in saturation to function as a transconductance amplifier.

The overdrive voltage Vov = VGS - Vt is a critical design parameter. It directly controls the saturation current and the transconductance gm = kn * Vov. A larger Vov gives higher current but reduces headroom in low-supply designs.

Given:
VGS = 1.8 V, Vt = 0.5 V, VDS = 1.5 V
kn = un * Cox * W/L = 200 uA/V^2

Why this formula applies:
VDS = 1.5 V > VGS - Vt = 1.3 V, so transistor is in saturation.

Formula:
ID = (kn/2) * (VGS - Vt)^2

Substitution:
ID = (200e-6 / 2) * (1.8 - 0.5)^2

Calculation:
ID = 100e-6 * (1.3)^2
ID = 100e-6 * 1.69

Final Answer:
ID = 169 uA

Exam Tip: In GATE problems, always check the operating region first by computing VGS - Vt and comparing with VDS. If VDS = VGS - Vt exactly, the transistor is at the boundary (edge of saturation). Use saturation formula here. Forgetting to check region is the most common mistake.

• In cutoff (VGS less than Vt), the channel does not form and ideally ID = 0. Practically, a small leakage current flows.
• In the linear region, the channel is uniform. The transistor is used as a switch (on-state) in digital logic.
• In saturation, channel is pinched off at drain. The current is approximately constant for given VGS. Used in analog amplifiers.
• The boundary between linear and saturation is defined by VDS = VGS - Vt = Vov.
• PMOS equations have the same form but all voltages are referenced with opposite sign. VGS is negative, threshold Vtp is negative, and current flows into source.

Quick Revision

• Cutoff: VGS less than Vt, ID = 0.
• Linear: VGS greater than Vt and VDS less than VGS - Vt. ID = kn/2 * [2(VGS-Vt)VDS - VDS^2].
• Saturation: VDS greater than or equal to VGS - Vt. ID = kn/2 * (VGS - Vt)^2.
• kn = un * Cox * W/L. Increasing W/L increases drive current linearly.
• PMOS: replace VGS with VSG, VDS with VSD, Vt with |Vtp|, use same formula structure.
• Trap: Do not use saturation formula when VDS is small. Always verify region before substituting.
• Transconductance gm = kn * (VGS - Vt) = sqrt(2 * kn * ID) in saturation.