1-to-8 Demultiplexer

Serial communication links in UART and SPI buses use a 1-to-8 demultiplexer to route a single data stream to one of eight receivers without separate wiring for each. The 74HC138, though primarily a decoder, is widely wired as a 1-to-8 DEMUX in real PCB designs.

Core Concept

Three select lines (C, B, A or S2, S1, S0) produce eight binary combinations from 000 to 111. The circuit decodes that combination to assert exactly one of Y0–Y7. The data input D is ANDed into the selected output's logic path. Every other output stays low.

The 74HC238 is the active-high output version often used as a true DEMUX. Its sibling 74HC138 gives active-low outputs. The 74HC238 runs from 2 V to 6 V, with a propagation delay of 8 ns at 5 V and three enable pins (E1, E2 active-low, E3 active-high) that must be correctly driven: E1=0, E2=0, E3=1 to enable.

In memory systems, a 1-to-8 DEMUX maps an 8-chip DRAM bank. The three address bits A0–A2 select one of eight chips while the data bus drives all chips simultaneously through separate data lines. Only the selected chip's CE is asserted.

Boolean Expression

The selected output equation is Yn = D · minterm(S2,S1,S0,n). For output Y5 (binary 101): Y5 = D · S2 · S1' · S0. The three select lines form a 3-variable minterm that is 1 only for the address matching n. All eight minterms are mutually exclusive, so exactly one output can be high at any moment.

Given:
  D = 1, S2=1, S1=0, S0=1 (select = 5), EN = enabled

Formula:
  Yn = D . minterm(S2,S1,S0) for n=0..7
  Y5 = D . S2 . S1' . S0

Step by step:
  S1' = NOT(0) = 1

  Y0 = 1.0.1.0 = 0  (minterm 0: S2'S1'S0')
  Y1 = 1.0.1.1 = 0
  Y2 = 1.0.0.0 = 0
  Y3 = 1.0.0.1 = 0
  Y4 = 1.1.1.0 = 0
  Y5 = 1.1.1.1 = 1   <-- selected
  Y6 = 1.1.0.0 = 0
  Y7 = 1.1.0.1 = 0

Final Answer:
  Y5 = 1, all others = 0

Exam Tip: The 74HC138 outputs are active-low, so the selected output goes to 0 and all others stay at 1. Many GATE and Anna University questions use the 74138 and expect active-low answers. Also remember: the 74HC138 has three enable pins—if E1 or E2 is not grounded, or E3 is not tied high, all outputs stay inactive (high). This catches many students in timing/enable questions.

Key Properties

• ICs: 74HC238 (active-high outputs), 74HC138 (active-low outputs)
• Select lines: 3 (S2, S1, S0) → 8 output channels
• Propagation delay: 8 ns typical at VCC = 5 V (74HC238)
• Supply voltage: 2 V to 6 V (HC CMOS family)
• Fan-out: 10 HC loads per output
• 74HC138 enable: E1 active-high, E2 and E3 active-low (all three must be satisfied)
• Power: ~0.1 mW static (HC CMOS), ~80 mW (LS TTL equivalent 74LS138)

Quick Revision

• 1-to-8 DEMUX: 1 data line, 3 select lines, 8 outputs
• Selected output = D; all others = 0 (active-high) or 1 (active-low)
• 74HC238: active-high; 74HC138: active-low—know which the question uses
• Boolean: Yn = D · m(n) where m(n) is the 3-variable minterm for n
• Used in DRAM bank selection, SPI bus routing, LED matrix column driving
• Two 74HC138 chips + inverter build a 1-to-16 DEMUX
• Exam trap: forgetting to satisfy all three enable conditions on 74HC138 before drawing outputs