Binary Subtraction

Binary subtraction is performed inside every ALU using adder hardware combined with 2s complement negation. The Intel 8085 SUB instruction and ARM SUBS instruction both rely on this add-and-complement technique.

Core Concept

Binary subtraction has four rules: 0−0=0, 1−0=1, 1−1=0, and 0−1=1 with a borrow from the next higher bit. The borrow concept is analogous to borrowing 10 in decimal subtraction, except borrowing 2 in binary.

Hardware circuits do not implement subtraction with a dedicated subtractor. They use the 2s complement method: to compute A−B, find the 2s complement of B, then add it to A using the existing adder circuit. If a carry-out results from the MSB, it is discarded and the answer is positive. If no carry-out results, the answer is negative and remains in 2s complement form.

The 74LS283 adder IC is used for subtraction by setting B inputs to the 1s complement and asserting Cin=1, which produces the 2s complement add in hardware. This is exactly how the subtract mode of an ALU operates. The 8085 SUB instruction internally does A + (2s complement of source register).

Boolean Expression

Using 2s complement: A − B = A + (B̄ + 1). Here B̄ is the bitwise NOT (1s complement) of B. Adding 1 converts it to 2s complement. The final carry-out from the MSB is the borrow indicator in subtraction hardware. A carry-out of 1 means no borrow; a carry-out of 0 means borrow occurred (result is negative).

Given:
  Subtract using 2s complement: A = 10110 (22), B = 01001 (9)

Formula / Rule:
  A - B = A + 2s complement of B
  2s complement of B = 1s complement + 1

Step by step:
  B = 01001
  1s complement of B = 10110
  2s complement of B = 10110 + 1 = 10111

  Now add A + 2s complement of B:
    10110
  + 10111
  -------
   101101

  Carry out from MSB = 1, discard it.
  Result = 01101

Final Answer:
  01101 = 13 in decimal  (22 - 9 = 13, correct)

Exam Tip: When there is no end carry after 2s complement subtraction, the result is negative and is already in 2s complement form. To find the magnitude, take the 2s complement of that result. GATE problems often ask students to identify whether the answer is negative — check for the absence of the end carry, not the sign of individual bits.

Key Properties

• Four subtraction rules; 0−1 borrows from the next higher column
• Hardware uses 2s complement method: subtractor = adder + inverters + Cin=1
• 74LS283 performs subtraction when B inputs are complemented and Cin tied high
• End carry = 1 means positive result; end carry = 0 means negative result (borrow)
• Result is valid in n bits only if no overflow in the signed interpretation
• 1s complement subtraction uses end-around carry (add the carry-out back to LSB)
• Borrow propagation in direct subtraction is as slow as carry propagation in addition

Quick Revision

• 0−1 = 1 with a borrow from the next bit
• 2s complement method: A−B = A + (B̄ + 1)
• End carry present: result is positive, discard the carry
• No end carry: result is negative, in 2s complement form
• 74LS283 does subtraction with inverted B and Cin=1
• 1s complement subtraction: add end carry back to LSB (end-around carry)
• Intel 8085 SUB: internally computes A + 2s complement of operand
• Exam trap: seeing an end carry of 1 and thinking overflow — end carry 1 means the answer is positive and correct, not overflow