Mealy State Machine

Traffic light controllers and vending machine logic are built as finite state machines. The Mealy machine is the version where the output depends on both the current state and the present input — this makes it faster to respond and is common in hardware serial communication decoders.

Core Concept

A Mealy machine has three parts: a next-state combinational block, a state register (D flip-flops), and an output combinational block. The output is computed from the present state AND the present input simultaneously.

Because output depends on input directly, a Mealy machine reacts within the same clock cycle that the input changes — without waiting for the next clock edge. This makes it one state fewer than an equivalent Moore machine for the same detection task. However, it can produce glitches on outputs if the input glitches, since the output path is purely combinational.

In practice, Mealy machines are implemented with D flip-flops (74HC74 for 2-bit state, 74HC175 for 4-bit). A state register with n flip-flops can represent up to 2n states. The output logic drives the system directly or through a registered output buffer if glitch suppression is needed.

Boolean Expression

The general Mealy model: next state NS = f(PS, X) and output Z = g(PS, X). Both f and g are combinational. This contrasts with Moore where g = g(PS) only. In a state diagram, Mealy transitions are labelled input / output on the arc between states.

Mealy machine: detect input sequence 1011 (overlapping not allowed)
States: S0 (reset), S1 (received 1), S2 (received 10), S3 (received 101)
Input: X   Output: Z

State Transition Table:
PS   X=0            X=1
S0   NS=S0, Z=0     NS=S1, Z=0
S1   NS=S2, Z=0     NS=S1, Z=0
S2   NS=S0, Z=0     NS=S3, Z=0
S3   NS=S0, Z=0     NS=S1, Z=1  ← output 1 on this arc (1011 complete)

Trace input: 1 0 1 1
  Start at S0
  X=1 → move to S1, Z=0
  X=0 → move to S2, Z=0
  X=1 → move to S3, Z=0
  X=1 → move to S0, Z=1   ← sequence 1011 detected!

Final Answer:
  Output Z=1 appears during the clock cycle when the 4th bit (second 1) is present.
  In a Mealy machine this output is combinational — it appears immediately with the input,
  not after the next clock edge.

Exam Tip: In a Mealy machine state diagram, the label on each arc is written as INPUT/OUTPUT. A common exam mistake is placing the output inside the state circle — that is the Moore convention. Mealy outputs change as soon as the input changes, even mid-cycle. This causes potential glitches. Also, for the same sequence detection task, a Mealy machine requires one fewer state than a Moore machine — GATE frequently tests this comparison.

Key Properties

• Output Z = g(Present State, Input X) — combinational, not registered
• Next State NS = f(Present State, Input X) — standard for both Mealy and Moore
• Typically one fewer state than equivalent Moore machine for the same task
• Output changes as soon as input changes — can glitch if input is noisy
• Implemented with D flip-flops: 74HC74 (dual D-FF), 74HC175 (quad D-FF, 4-bit state)
• State diagram arcs labelled input/output; state circles contain only state name
• Common in serial data decoders, handshake controllers, and protocol state machines

Quick Revision

• Mealy: output depends on present state AND present input simultaneously
• Output label goes on the arc (transition), not inside the state circle
• One fewer state than Moore for equivalent sequence detection
• Can produce glitches because output is combinational and follows input directly
• Equations: NS = f(PS, X); Z = g(PS, X)
• Used in protocol decoders (UART, SPI state machines) for fast response
• n flip-flops → up to 2^n states possible
• Exam trap: writing output inside the state bubble in a Mealy diagram — that makes it a Moore machine, which is a different model entirely.