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NOR Gate

Universal gate, truth table, Y=(A+B)', IC 7402.

Darshan N
Updated: 19 March 2026
12 min read

The NOR gate is one of the most important logic gates in digital electronics because it is a universal gate, meaning any Boolean function can be implemented using NOR gates alone. It combines the OR operation with an inversion, producing a LOW output whenever any input is HIGH.

For GATE aspirants and university examinations, NOR gate questions frequently test truth table recall, universality proofs, and IC pin configurations. Understanding NOR gate behavior at both the logic and transistor level is essential for scoring well in digital electronics.

NOR Gate: Symbol, Truth Table and IC 7402ABYNOR Gate SymbolY = (A+B)'Truth TableABY=(A+B)'001010100110Output HIGH only when both inputs are LOWIC 7402 Pin Configuration (Quad 2-Input NOR)Pin 7: GND Pin 14: VCC (+5V) Contains 4 independent NOR gatesGate 1: Pins 1(Y), 2(A), 3(B) Gate 2: Pins 4(Y), 5(A), 6(B)
Figure 1: NOR gate symbol, complete truth table, and IC 7402 overview

Core Concept: What NOR Gate Does

The NOR gate performs the complemented OR operation. The Boolean expression is written as Y = (A + B)'. This means the output Y is the logical inverse of the OR of all inputs. The output is HIGH only when every input is LOW simultaneously.

Physically, in a TTL implementation (like IC 7402), transistors are arranged so that if any input pulls a transistor into saturation, the output is pulled LOW. Only when all inputs are LOW do all transistors remain in cut-off, allowing the output to be pulled HIGH through a pull-up resistor. This transistor-level behavior directly maps to the NOR truth table.

The NOR gate is classified as a universal gate because it can implement any logic function without needing other gate types. This universality makes it extremely valuable in VLSI design where minimizing gate types reduces fabrication complexity and cost.

Mathematical Expression

For a 2-input NOR gate, the Boolean expression is:

Y = (A + B)'

This can be extended to n inputs. For a 3-input NOR gate: Y = (A + B + C)'. The NOR operation is related to AND and OR through De Morgan's Theorem: (A + B)' = A' . B'. This identity is critical for GATE problems involving NOR-to-NAND conversions and bubble pushing.

The relationship (A + B)' = A' . B' tells us that a NOR gate is equivalent to an AND gate with both inputs individually inverted. This is the foundation of the universality proof: you can construct NOT, AND, and OR gates entirely from NOR gates.

Practical Understanding: Universality of NOR Gate

To prove NOR is universal, you must show that NOT, AND, and OR can all be derived from NOR gates alone. Once these three fundamental gates are available, any Boolean expression can be realized.

NOT gate using NOR: Connect both inputs of a NOR gate together (A = B). The output becomes (A + A)' = A'. This is a single NOR gate functioning as an inverter. AND gate using NOR: First invert A and B using two NOR-as-NOT gates, then NOR the two inverted signals. By De Morgan's theorem, (A' + B')' = A . B. OR gate using NOR: Take the NOR output and invert it using another NOR-as-NOT gate. Result: ((A + B)')' = A + B.

In practice, IC 7402 is the standard quad 2-input NOR gate in the 74xx TTL series. It operates at 5V VCC and has four independent NOR gates. Each gate has a propagation delay of approximately 10 ns, making it suitable for medium-speed digital circuits. NOR-based design is particularly common in CMOS technology because CMOS NOR gates are faster than CMOS NAND gates for some configurations.

Numerical Example

Consider a 3-input NOR gate where you must determine the output for input combination A=1, B=0, C=0, and also verify the universality by designing a NOT gate using a 2-input NOR gate with A as the only input.

Example
Given:
A = 1, B = 0, C = 0 for 3-input NOR gate
For NOT: Single input A connected to both pins of a 2-input NOR gate

Why this formula applies:
3-input NOR: Y = (A + B + C)'
NOR-as-NOT: Y = (A + A)' = A'

Formula:
Y_NOR3 = (A + B + C)'
Y_NOT = (A + A)' = A'

Substitution:
Y_NOR3 = (1 + 0 + 0)' = (1)' = 0
Y_NOT (for A=1) = (1 + 1)' = (1)' = 0 = A' confirmed
Y_NOT (for A=0) = (0 + 0)' = (0)' = 1 = A' confirmed

Calculation:
OR sum = 1 + 0 + 0 = 1
NOR output = complement of 1 = 0

Final Answer with units:
Y (3-input NOR, A=1,B=0,C=0) = 0 (Logic LOW)
NOT gate verified: output = A' for both input cases
Exam Tip: NOR gate output is HIGH only when ALL inputs are LOW. In GATE problems, if even one input is HIGH, the NOR output is always 0. Also remember: De Morgan's law (A+B)' = A'.B' is the key to NOR universality proofs and bubble-pushing questions.
  • Y = (A + B)': output is HIGH only when all inputs are LOW, confirming NOR behavior.
  • NOT from NOR: Connect both inputs together, output is A', requiring only one IC.
  • AND from NOR: Invert both inputs individually, then NOR them using De Morgan's theorem.
  • OR from NOR: Apply NOR then invert the output using another NOR-as-NOT stage.
  • IC 7402 contains four independent 2-input NOR gates, powered at 5V VCC.

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Quick Revision

  • NOR gate expression: Y = (A + B)'. Output is HIGH only when all inputs are 0.
  • Truth table: Only the row with all inputs LOW gives output = 1; all other rows give 0.
  • Universal gate: NOT (tie inputs), AND (invert inputs then NOR), OR (NOR then invert output).
  • De Morgan's identity: (A + B)' = A' . B' is the basis of NOR universality.
  • IC 7402: Quad 2-input NOR, TTL family, VCC = 5V, 4 gates per IC.
  • Exam trap: Do not confuse NOR with NAND universality. Both are universal but use different gate combinations to implement the three basic gates.
  • For n-input NOR: Y = (A1 + A2 + ... + An)'. Output is 1 only when all n inputs are 0.

NOR Gate Quiz

Test your understanding of NOR as a universal gate and its Boolean equivalence via De Morgan's theorem.

Question 1 of 3

Q1.How many 2-input NOR gates are required to implement a NOT gate?