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EPROM and EEPROM

UV erasable, electrically erasable, Flash memory basics.

Darshan N
Updated: 7 April 2026
8 min read

UV EPROMs made iterative firmware development possible in the 1980s and 1990s — engineers could burn code, test it in a device, erase the chip under a UV lamp, and reprogram. EEPROM then eliminated the UV lamp, enabling in-system programming that is still the foundation of modern Flash microcontrollers.

EPROM vs EEPROM — Cell Structure ComparisonEPROM Cell (Floating Gate)e.g. 27C256 — erased by UV lightControl GateFloating Gate(electrically isolated — stores charge)SiO₂ insulator (thick: ~50 nm)N-channel MOSFET channelErase: UV 253.7 nm, 15–30 minProgram: 12.5V on control gate(hot electron injection)Erase count: 100–1000 cyclesEEPROM Cell (Tunnel Oxide)e.g. 28C256 — erased electricallyControl GateFloating GateTunnel oxide (thin: ~10 nm)N-channel MOSFET channelErase: apply -Vpp to control gate(Fowler-Nordheim tunneling)Can erase single bytes in-systemErase count: 10,000–100,000 cycles28C256: tWrite ≈ 5–10 ms/byte
Figure 1: EPROM vs EEPROM cell structure. EPROM uses thick oxide and UV erase; EEPROM uses thin tunnel oxide and Fowler-Nordheim tunneling for electrical erase.

Core Concept

Both EPROM and EEPROM use a floating gate MOSFET cell. A standard MOSFET has a control gate connected to a signal. The floating gate variant inserts an additional polysilicon gate that is completely surrounded by silicon dioxide insulator. Charge trapped on the floating gate shifts the transistor's threshold voltage. A high threshold means the cell reads as 0; a low threshold (uncharged) reads as 1.

In EPROM (e.g. 27C256), programming applies +12.5V to the control gate, injecting electrons onto the floating gate by hot-carrier injection. The oxide is thick (~50 nm), so erasing requires UV light at 253.7 nm wavelength for 15–30 minutes — the photons give trapped electrons enough energy to escape. The quartz window on top of a 27C256 DIP package serves exactly this purpose. EPROM can be erased 100–1000 times before the oxide degrades.

EEPROM (e.g. 28C256, AT28C256) uses a much thinner tunnel oxide (~10 nm). Applying a reverse voltage across this thin layer causes electrons to tunnel through via the Fowler-Nordheim tunneling mechanism — a quantum-mechanical effect that requires no UV light. This allows byte-by-byte electrical erase and rewrite without removing the chip from the circuit. Write time is slow (5–10 ms per byte), but endurance reaches 10,000–100,000 erase cycles. Modern Flash memory is essentially a high-density EEPROM optimized for block erase.

Boolean Expression

There is no Boolean expression specific to EPROM/EEPROM operation, but the capacity formula applies: Capacity = 2ⁿ × m bits. The 27C256 has 15 address lines and 8 data lines: 2¹⁵ × 8 = 262,144 bits = 256 Kbits = 32 KB. The 27C512 doubles this to 64 KB. The key operational distinction is: EPROM erase = entire chip at once (UV), EEPROM erase = individual bytes or pages (electrical). Flash EEPROM erases in sectors (blocks of 4 KB to 64 KB).

Example
Given:
Compare EPROM and EEPROM parameters for 27C256 vs 28C256
Both: 32K × 8 organization (same capacity and pinout)

Formula / Rule:
Capacity = 2^(address lines) × data width
Erase time comparison — the key differentiator

Step by step:
Address lines: 15 (A0–A14) → 2^15 = 32,768 locations
Data width: 8 bits (D0–D7)
Capacity: 32,768 × 8 = 262,144 bits = 256 Kbits = 32 KB

27C256 (EPROM):
  Read access time: 120–250 ns
  Program voltage: Vpp = 12.5V
  Erase: UV light, 253.7 nm, 15–30 minutes, whole chip
  Erase cycles: 100–1000
  Identify: quartz window on ceramic DIP package

28C256 (EEPROM):
  Read access time: 150 ns
  Program voltage: internal charge pump (no external Vpp)
  Erase: electrical, byte-level, in-system
  Write time: 5–10 ms per byte (slow!)
  Erase cycles: 10,000–100,000
  Identify: plastic DIP (no window needed)

Final Answer:
Same capacity and pinout; fundamental difference is erase mechanism:
EPROM → UV, chip-wide, needs programmer
EEPROM → electrical, byte-level, in-circuit
Exam Tip: GATE often tests the erase mechanism. EPROM: UV light erases entire chip (cannot selectively erase). EEPROM: electrical erase, byte or page at a time, in-system. The quartz window is the visual identifier of EPROM — covering it with tape after programming prevents accidental UV erase from room fluorescent lights (which emit some UV). Also note: Flash memory is EEPROM with block erase and much smaller cell size — the floating gate structure is the same.

Key Properties

  • EPROM cell: floating gate with ~50 nm thick SiO₂; erase by UV (253.7 nm, 15–30 min, whole chip)
  • 27C256: 32K×8, Vcc=5V, Vpp=12.5V programming, tACC=120–250 ns, 100–1000 erase cycles
  • EEPROM cell: floating gate with ~10 nm tunnel oxide; erase by Fowler-Nordheim tunneling
  • 28C256 / AT28C256: 32K×8, 5V only (internal charge pump), tACC=150 ns, tWrite=5–10 ms/byte
  • EEPROM endurance: 10,000–100,000 erase cycles vs EPROM 100–1000 cycles
  • Flash EEPROM: same floating gate cell but erased in sectors (4KB–64KB) — higher density
  • AT24C series (I2C EEPROM): 1Kbit–512Kbit, 100 kHz–400 kHz interface, used in embedded systems for config storage

Quick Revision

  • Both EPROM and EEPROM use floating gate MOSFET — charge on floating gate sets threshold voltage
  • Charged floating gate → high Vth → cell reads 0; uncharged → low Vth → reads 1
  • EPROM: program by hot-carrier injection (12.5V); erase by UV light (entire chip)
  • EEPROM: program and erase by Fowler-Nordheim tunneling (electrical, byte-level)
  • 27C256 has quartz window (for UV); 28C256 is plastic package (no window needed)
  • 27C256 and 28C256 have identical 32K×8 organization and compatible pinouts
  • Flash = EEPROM with block erase — sector must be erased before rewrite
  • Exam trap: saying EPROM can erase individual bytes — it cannot; UV erases the entire chip at once

EPROM EEPROM Quiz

Assess your grasp of erasable programmable memory technologies and their distinctions.

Question 1 of 3

Q1.In an EPROM cell, data is stored by trapping charge on which structure?