1s Complement

The 1s complement representation was used in early mainframes and still appears in GATE problems as the foundation for understanding 2s complement. The UNIVAC 1100 series used 1s complement arithmetic.

Core Concept

In the 1s complement system, the negative of a number is obtained by inverting all its bits. For a 4-bit number like 0101 (+5), the 1s complement is 1010, representing −5. The MSB acts as the sign bit: 0 for positive, 1 for negative.

The defining problem with 1s complement is the existence of two representations of zero: 0000 (+0) and 1111 (−0). This complicates comparisons and conditional branching in hardware. An n-bit 1s complement system represents numbers in the range −(2ⁿ⁻¹−1) to +(2ⁿ⁻¹−1). For 8 bits that is −127 to +127.

When adding two 1s complement numbers, if a carry propagates out of the MSB, it must be added back to the LSB. This is called the end-around carry. Without it, results involving negative numbers would be incorrect by 1. Modern ICs like the 74S283 do not use 1s complement arithmetic natively; 2s complement is standard in all current hardware families.

Boolean Expression

The 1s complement of a number N represented in n bits is: N̄ = (2ⁿ − 1) − N. This is equivalent to bitwise inversion. For subtraction A−B, compute A + (1s complement of B), then apply the end-around carry rule if a carry-out occurs.

Given:
  Compute (-5) + (-2) in 4-bit 1s complement

Formula / Rule:
  Represent each number in 1s complement, add, apply end-around carry

Step by step:
  +5 = 0101  so  -5 = 1010  (invert all bits)
  +2 = 0010  so  -2 = 1101  (invert all bits)

  Add:  1010
      + 1101
      ------
       1|0111

  End carry = 1, add back to LSB:
  0111 + 0001 = 1000

  MSB=1 means negative. Invert to find magnitude:
  Invert 1000 = 0111 = 7

Final Answer:
  Result is -7  (-5 + (-2) = -7, correct)

Exam Tip: GATE frequently tests the difference between 1s complement and 2s complement overflow. In 1s complement, the range for n bits is -(2^(n-1) - 1) to +(2^(n-1) - 1). The double-zero is a classic exam question: name two representations of zero in 1s complement. Also remember: end-around carry applies to 1s complement only; in 2s complement you simply discard the final carry.

Key Properties

• Negative number: invert all bits of the positive binary representation
• Sign bit: 0 = positive, 1 = negative (same as 2s complement)
• Range for n bits: -(2ⁿ⁻¹ - 1) to +(2ⁿ⁻¹ - 1)
• Two representations of zero: all-zeros and all-ones
• Subtraction: add 1s complement of subtrahend, then apply end-around carry
• End-around carry: if carry out of MSB occurs, add it to the LSB of the result
• Not used in modern ICs; 2s complement is universal in TTL, CMOS, and all CPU architectures

Quick Revision

• 1s complement: flip all bits to negate
• Two zeros exist: 0000 = +0, 1111 = −0 (for 4-bit)
• Range (4-bit): −7 to +7
• End-around carry: final carry-out is added back to LSB
• No end-around carry in 2s complement; end-around carry is unique to 1s complement
• UNIVAC and some older CDC machines used 1s complement arithmetic
• Overflow detection: carry into MSB XOR carry out of MSB
• Exam trap: forgetting the end-around carry gives a result that is off by 1, which is the exact size of the error introduced by the double-zero problem